From 626b3b243af9d9038b836b90e8a327464cb68a8e Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 22 Sep 2025 07:52:15 +0200 Subject: [PATCH] 6.16-stable patches added patches: clk-sunxi-ng-mp-fix-dual-divider-clock-rate-readback.patch --- ...fix-dual-divider-clock-rate-readback.patch | 41 +++++++++++++++++++ queue-6.16/series | 1 + 2 files changed, 42 insertions(+) create mode 100644 queue-6.16/clk-sunxi-ng-mp-fix-dual-divider-clock-rate-readback.patch diff --git a/queue-6.16/clk-sunxi-ng-mp-fix-dual-divider-clock-rate-readback.patch b/queue-6.16/clk-sunxi-ng-mp-fix-dual-divider-clock-rate-readback.patch new file mode 100644 index 0000000000..6d2fcddae5 --- /dev/null +++ b/queue-6.16/clk-sunxi-ng-mp-fix-dual-divider-clock-rate-readback.patch @@ -0,0 +1,41 @@ +From 25fbbaf515acd13399589bd5ee6de5f35740cef2 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai +Date: Sun, 31 Aug 2025 01:08:56 +0800 +Subject: clk: sunxi-ng: mp: Fix dual-divider clock rate readback + +From: Chen-Yu Tsai + +commit 25fbbaf515acd13399589bd5ee6de5f35740cef2 upstream. + +When dual-divider clock support was introduced, the P divider offset was +left out of the .recalc_rate readback function. This causes the clock +rate to become bogus or even zero (possibly due to the P divider being +1, leading to a divide-by-zero). + +Fix this by incorporating the P divider offset into the calculation. + +Fixes: 45717804b75e ("clk: sunxi-ng: mp: introduce dual-divider clock") +Reviewed-by: Andre Przywara +Link: https://patch.msgid.link/20250830170901.1996227-4-wens@kernel.org +Signed-off-by: Chen-Yu Tsai +Signed-off-by: Greg Kroah-Hartman +--- + drivers/clk/sunxi-ng/ccu_mp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/clk/sunxi-ng/ccu_mp.c b/drivers/clk/sunxi-ng/ccu_mp.c +index 354c981943b6..4221b1888b38 100644 +--- a/drivers/clk/sunxi-ng/ccu_mp.c ++++ b/drivers/clk/sunxi-ng/ccu_mp.c +@@ -185,7 +185,7 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw, + p &= (1 << cmp->p.width) - 1; + + if (cmp->common.features & CCU_FEATURE_DUAL_DIV) +- rate = (parent_rate / p) / m; ++ rate = (parent_rate / (p + cmp->p.offset)) / m; + else + rate = (parent_rate >> p) / m; + +-- +2.51.0 + diff --git a/queue-6.16/series b/queue-6.16/series index 9767f0233b..9f1c987c0a 100644 --- a/queue-6.16/series +++ b/queue-6.16/series @@ -145,3 +145,4 @@ dt-bindings-serial-8250-move-a-constraint.patch samples-damon-prcl-fix-boot-time-enable-crash.patch samples-damon-change-enable-parameters-to-enabled.patch samples-damon-mtier-avoid-starting-damon-before-initialization.patch +clk-sunxi-ng-mp-fix-dual-divider-clock-rate-readback.patch -- 2.47.3