From 6499815172dbbe36e17c7cedb6c44ea8d81f84b3 Mon Sep 17 00:00:00 2001 From: Ioana Ciornei Date: Tue, 14 Oct 2025 18:53:55 +0300 Subject: [PATCH] arm64: dts: lx2160a-rdb: describe the QIXIS FPGA and two child GPIO controllers Describe the FPGA present on the LX2160ARDB board as a simple-mfd I2C device. The FPGA presents registers that deal with power-on-reset timing, muxing, SFP cage monitoring and control etc. Also add the two GPIO controllers responsible for monitoring and controlling the SFP+ cages used for MAC5 and MAC6. Signed-off-by: Ioana Ciornei Reviewed-by: Frank Li Signed-off-by: Shawn Guo --- .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 2373e1c371e8c..15ff503dcef3d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -170,6 +170,37 @@ &i2c0 { status = "okay"; + cpld@66 { + compatible = "fsl,lx2160ardb-fpga"; + reg = <0x66>; + #address-cells = <1>; + #size-cells = <0>; + + sfp2_csr: gpio@19 { + compatible = "fsl,lx2160ardb-fpga-gpio-sfp"; + reg = <0x19>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "SFP2_TX_EN", "", + "", "", + "SFP2_RX_LOS", "SFP2_TX_FAULT", + "", "SFP2_MOD_ABS"; + }; + + sfp3_csr: gpio@1a { + compatible = "fsl,lx2160ardb-fpga-gpio-sfp"; + reg = <0x1a>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "SFP3_TX_EN", "", + "", "", + "SFP3_RX_LOS", "SFP3_TX_FAULT", + "", "SFP3_MOD_ABS"; + }; + }; + i2c-mux@77 { compatible = "nxp,pca9547"; reg = <0x77>; -- 2.47.3