From 66c2a3173cdaf7b776552203609f008c8709dd22 Mon Sep 17 00:00:00 2001 From: Junhui Liu Date: Tue, 21 Oct 2025 17:41:37 +0800 Subject: [PATCH] dt-bindings: riscv: Add Nuclei UX900 compatibles The UX900 is a RISC-V core from Nuclei, used in the Anlogic DR1V90 SoC. It features a 64-bit architecture and dual-issue, 9-stage pipeline, with lots of optional extensions including V, K, Zc, and more. Acked-by: Conor Dooley Signed-off-by: Junhui Liu Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index 153d0dac57fb3..20b7c834559cb 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -48,6 +48,7 @@ properties: - amd,mbv64 - andestech,ax45mp - canaan,k210 + - nuclei,ux900 - sifive,bullet0 - sifive,e5 - sifive,e7 -- 2.47.3