From 74883accfa4a717337413c3ca243e997cc384a55 Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Wed, 12 Nov 2025 19:05:09 +0800 Subject: [PATCH] mtd: spi-nor: micron-st: rename the die_late_init functions st_nor_two/four_die_late_init() also suit for micron chips, so rename to micron_st_nor_two/four_die_late_init(), and move these functions up, then micron can use these function without declaration. Reviewed-by: Tudor Ambarus Signed-off-by: Haibo Chen Signed-off-by: Pratyush Yadav --- drivers/mtd/spi-nor/micron-st.c | 70 ++++++++++++++++----------------- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index 187239ccd5495..92eb14ca76c57 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -127,6 +127,38 @@ static int micron_st_nor_set_octal_dtr(struct spi_nor *nor, bool enable) micron_st_nor_octal_dtr_dis(nor); } +static int micron_st_nor_four_die_late_init(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter *params = nor->params; + + params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE; + params->n_dice = 4; + + /* + * Unfortunately the die erase opcode does not have a 4-byte opcode + * correspondent for these flashes. The SFDP 4BAIT table fails to + * consider the die erase too. We're forced to enter in the 4 byte + * address mode in order to benefit of the die erase. + */ + return spi_nor_set_4byte_addr_mode(nor, true); +} + +static int micron_st_nor_two_die_late_init(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter *params = nor->params; + + params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE; + params->n_dice = 2; + + /* + * Unfortunately the die erase opcode does not have a 4-byte opcode + * correspondent for these flashes. The SFDP 4BAIT table fails to + * consider the die erase too. We're forced to enter in the 4 byte + * address mode in order to benefit of the die erase. + */ + return spi_nor_set_4byte_addr_mode(nor, true); +} + static void mt35xu512aba_default_init(struct spi_nor *nor) { nor->params->set_octal_dtr = micron_st_nor_set_octal_dtr; @@ -193,48 +225,16 @@ static const struct spi_nor_fixups mt25qu512a_fixups = { .post_bfpt = mt25qu512a_post_bfpt_fixup, }; -static int st_nor_four_die_late_init(struct spi_nor *nor) -{ - struct spi_nor_flash_parameter *params = nor->params; - - params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE; - params->n_dice = 4; - - /* - * Unfortunately the die erase opcode does not have a 4-byte opcode - * correspondent for these flashes. The SFDP 4BAIT table fails to - * consider the die erase too. We're forced to enter in the 4 byte - * address mode in order to benefit of the die erase. - */ - return spi_nor_set_4byte_addr_mode(nor, true); -} - -static int st_nor_two_die_late_init(struct spi_nor *nor) -{ - struct spi_nor_flash_parameter *params = nor->params; - - params->die_erase_opcode = SPINOR_OP_MT_DIE_ERASE; - params->n_dice = 2; - - /* - * Unfortunately the die erase opcode does not have a 4-byte opcode - * correspondent for these flashes. The SFDP 4BAIT table fails to - * consider the die erase too. We're forced to enter in the 4 byte - * address mode in order to benefit of the die erase. - */ - return spi_nor_set_4byte_addr_mode(nor, true); -} - static const struct spi_nor_fixups n25q00_fixups = { - .late_init = st_nor_four_die_late_init, + .late_init = micron_st_nor_four_die_late_init, }; static const struct spi_nor_fixups mt25q01_fixups = { - .late_init = st_nor_two_die_late_init, + .late_init = micron_st_nor_two_die_late_init, }; static const struct spi_nor_fixups mt25q02_fixups = { - .late_init = st_nor_four_die_late_init, + .late_init = micron_st_nor_four_die_late_init, }; static const struct flash_info st_nor_parts[] = { -- 2.47.3