From 75cc48275fbb90e9b51e8c56339f985a689b9485 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 21 May 2025 16:08:37 -0500 Subject: [PATCH] dt-bindings: clock: Convert marvell,berlin2-clk to DT schema Convert the Marvell Berlin2 clock binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250521210839.62409-1-robh@kernel.org Signed-off-by: Stephen Boyd --- .../bindings/clock/marvell,berlin.txt | 31 ----------- .../bindings/clock/marvell,berlin2-clk.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/marvell,berlin.txt create mode 100644 Documentation/devicetree/bindings/clock/marvell,berlin2-clk.yaml diff --git a/Documentation/devicetree/bindings/clock/marvell,berlin.txt b/Documentation/devicetree/bindings/clock/marvell,berlin.txt deleted file mode 100644 index c611c495f3ffb..0000000000000 --- a/Documentation/devicetree/bindings/clock/marvell,berlin.txt +++ /dev/null @@ -1,31 +0,0 @@ -Device Tree Clock bindings for Marvell Berlin - -This binding uses the common clock binding[1]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Clock related registers are spread among the chip control registers. Berlin -clock node should be a sub-node of the chip controller node. Marvell Berlin2 -(BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some -minor differences in features and register layout. - -Required properties: -- compatible: must be "marvell,berlin2-clk" or "marvell,berlin2q-clk" -- #clock-cells: must be 1 -- clocks: must be the input parent clock phandle -- clock-names: name of the input parent clock - Allowed clock-names for the reference clocks are - "refclk" for the SoCs oscillator input on all SoCs, - and SoC-specific input clocks for - BG2/BG2CD: "video_ext0" for the external video clock input - - -Example: - -chip_clk: clock { - compatible = "marvell,berlin2q-clk"; - - #clock-cells = <1>; - clocks = <&refclk>; - clock-names = "refclk"; -}; diff --git a/Documentation/devicetree/bindings/clock/marvell,berlin2-clk.yaml b/Documentation/devicetree/bindings/clock/marvell,berlin2-clk.yaml new file mode 100644 index 0000000000000..8d48a2c7e3813 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,berlin2-clk.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,berlin2-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Berlin Clock Controller + +maintainers: + - Jisheng Zhang + +description: + Clock related registers are spread among the chip control registers. Berlin + clock node should be a sub-node of the chip controller node. Marvell Berlin2 + (BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some minor + differences in features and register layout. + +properties: + compatible: + enum: + - marvell,berlin2-clk + - marvell,berlin2q-clk + + '#clock-cells': + const: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - enum: + - refclk + - video_ext0 + +required: + - compatible + - '#clock-cells' + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "marvell,berlin2q-clk"; + #clock-cells = <1>; + clocks = <&refclk>; + clock-names = "refclk"; + }; -- 2.47.2