From 7a356ee5cf6dad1c7d305eea261a03a925454ed6 Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Wed, 17 Sep 2025 16:52:00 +0300 Subject: [PATCH] drm/i915: add note on VLV/CHV hpll_freq and czclk_freq caching MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The caching at the initial read is a bit fragile in case, say, a further refactoring starts reading the frequencies at a time where it's not possible. Add a note about it. Suggested-by: Ville Syrjälä Reviewed-by: Ville Syrjälä Link: https://lore.kernel.org/r/20250917135200.1932903-1-jani.nikula@intel.com Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/vlv_clock.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/vlv_clock.c b/drivers/gpu/drm/i915/display/vlv_clock.c index 2c55083d8fdbb..42c2837b32c1f 100644 --- a/drivers/gpu/drm/i915/display/vlv_clock.c +++ b/drivers/gpu/drm/i915/display/vlv_clock.c @@ -8,6 +8,13 @@ #include "vlv_clock.h" #include "vlv_sideband.h" +/* + * FIXME: The caching of hpll_freq and czclk_freq relies on the first calls + * occurring at a time when they can actually be read. This appears to be the + * case, but is somewhat fragile. Make the initialization explicit at a point + * where they can be reliably read. + */ + /* returns HPLL frequency in kHz */ int vlv_clock_get_hpll_vco(struct drm_device *drm) { -- 2.47.3