From 7c2572b926c3f5deeba8f45af7c62de77563521c Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Fri, 24 Apr 2015 21:11:25 +0000 Subject: [PATCH] backport: rs6000.c (rtx_is_swappable_p): Commentary adjustments. [gcc] 2015-04-24 Bill Schmidt Backport from mainline r222351 2015-04-22 Bill Schmidt * config/rs6000/rs6000.c (rtx_is_swappable_p): Commentary adjustments. (insn_is_swappable_p): Return 1 for a convert from double to single precision when all of its uses are splats of BE element zero. [gcc/testsuite] 2015-04-24 Bill Schmidt Backport from mainline r222351 2015-04-22 Bill Schmidt * gcc.target/powerpc/swaps-p8-18.c: New test. From-SVN: r222427 --- gcc/ChangeLog | 11 ++++++ gcc/config/rs6000/rs6000.c | 39 +++++++++++++++---- gcc/testsuite/ChangeLog | 7 ++++ .../gcc.target/powerpc/swaps-p8-18.c | 35 +++++++++++++++++ 4 files changed, 85 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index acb1ccaf857a..827f525813ed 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2015-04-24 Bill Schmidt + + Backport from mainline r222351 + 2015-04-22 Bill Schmidt + + * config/rs6000/rs6000.c (rtx_is_swappable_p): Commentary + adjustments. + (insn_is_swappable_p): Return 1 for a convert from double to + single precision when all of its uses are splats of BE element + zero. + 2015-04-24 Bill Schmidt Backport from mainline r222349 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 3f997326d685..551af93975a4 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -33637,7 +33637,8 @@ rtx_is_swappable_p (rtx op, unsigned int *special) order-dependent element, so additional fixup code would be needed to make those work. Vector set and non-immediate-form vector splat are element-order sensitive. A few of these - cases might be workable with special handling if required. */ + cases might be workable with special handling if required. + Adding cost modeling would be appropriate in some cases. */ int val = XINT (op, 1); switch (val) { @@ -33676,12 +33677,6 @@ rtx_is_swappable_p (rtx op, unsigned int *special) case UNSPEC_VUPKLPX: case UNSPEC_VUPKLS_V4SF: case UNSPEC_VUPKLU_V4SF: - /* The following could be handled as an idiom with XXSPLTW. - These place a scalar in BE element zero, but the XXSPLTW - will currently expect it in BE element 2 in a swapped - region. When one of these feeds an XXSPLTW with no other - defs/uses either way, we can avoid the lane change for - XXSPLTW and things will be correct. TBD. */ case UNSPEC_VSX_CVDPSPN: case UNSPEC_VSX_CVSPDP: case UNSPEC_VSX_CVSPDPN: @@ -33772,6 +33767,36 @@ insn_is_swappable_p (swap_web_entry *insn_entry, rtx insn, return 0; } + /* A convert to single precision can be left as is provided that + all of its uses are in xxspltw instructions that splat BE element + zero. */ + if (GET_CODE (body) == SET + && GET_CODE (SET_SRC (body)) == UNSPEC + && XINT (SET_SRC (body), 1) == UNSPEC_VSX_CVDPSPN) + { + df_ref *def_rec; + + for (def_rec = DF_INSN_UID_DEFS (i); *def_rec; def_rec++) + { + df_ref def = *def_rec; + struct df_link *link = DF_REF_CHAIN (def); + if (!link) + return 0; + + for (; link; link = link->next) { + rtx use_insn = DF_REF_INSN (link->ref); + rtx use_body = PATTERN (use_insn); + if (GET_CODE (use_body) != SET + || GET_CODE (SET_SRC (use_body)) != UNSPEC + || XINT (SET_SRC (use_body), 1) != UNSPEC_VSX_XXSPLTW + || XEXP (XEXP (SET_SRC (use_body), 0), 1) != const0_rtx) + return 0; + } + } + + return 1; + } + /* Otherwise check the operands for vector lane violations. */ return rtx_is_swappable_p (body, special); } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 73cd1b857965..c71e7e79e1e1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2015-04-24 Bill Schmidt + + Backport from mainline r222351 + 2015-04-22 Bill Schmidt + + * gcc.target/powerpc/swaps-p8-18.c: New test. + 2015-04-24 Bill Schmidt Backport from mainline r222349 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c new file mode 100644 index 000000000000..c55f527d420c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-18.c @@ -0,0 +1,35 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O3" } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +/* This is a test for a specific convert-splat permute removal. */ + +void compute (float*, float*, float*, int, int); +double test (void); +double gorp; + +int main (void) +{ + float X[10000], Y[256], Z[2000]; + int i; + for (i = 0; i < 2500; i++) + compute (X, Y, Z, 256, 2000); + gorp = test (); +} + +void compute(float *X, float *Y, float *Z, int m, int n) +{ + int i, j; + float w, *x, *y; + + for (i = 0; i < n; i++) + { + w = 0.0; + x = X++; + y = Y; + for (j = 0; j < m; j++) + w += (*x++) * (*y++); + Z[i] = w; + } +} -- 2.47.2