From 802aefb21106b350afa1330d5a13ba7d49bf3bb1 Mon Sep 17 00:00:00 2001 From: Petar Jovanovic Date: Wed, 12 Oct 2016 18:58:36 +0000 Subject: [PATCH] mips32: add the test cases for luxc1/suxc1 instructions Add the tests cases (in none/tests/mips32/vfp.c) that expose the error with luxc1/suxc1 that was fixed by VEX r3262. Patch by Aleksandra Karadzic. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16040 --- none/tests/mips32/Makefile.am | 31 +-- none/tests/mips32/vfp.c | 126 ++++++++- .../mips32/vfp.stdout.exp-mips32r2-fpu_64-BE | 239 ++++++++++++++++++ .../mips32/vfp.stdout.exp-mips32r2-fpu_64-LE | 239 ++++++++++++++++++ 4 files changed, 619 insertions(+), 16 deletions(-) create mode 100644 none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-BE create mode 100644 none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-LE diff --git a/none/tests/mips32/Makefile.am b/none/tests/mips32/Makefile.am index 6983f8510e..6f9fd7a452 100644 --- a/none/tests/mips32/Makefile.am +++ b/none/tests/mips32/Makefile.am @@ -6,10 +6,13 @@ dist_noinst_SCRIPTS = filter_stderr EXTRA_DIST = \ block_size.stdout.exp block_size.stderr.exp block_size.vgtest \ branches.stdout.exp branches.stderr.exp branches.vgtest \ + bug320057-mips32.stdout.exp bug320057-mips32.stderr.exp \ + bug320057-mips32.vgtest \ change_fp_mode.stdout.exp change_fp_mode.stdout.exp-fpu32 \ - change_fp_mode.stderr.exp change_fp_mode.vgtest \ + change_fp_mode.stderr.exp change_fp_mode.vgtest \ FPUarithmetic.stdout.exp FPUarithmetic.stdout.exp-mips32 \ FPUarithmetic.stderr.exp FPUarithmetic.vgtest \ + fpu_branches.stdout.exp fpu_branches.stderr.exp fpu_branches.vgtest \ LoadStore.stdout.exp LoadStore.stdout.exp-BE LoadStore.stderr.exp \ LoadStore.vgtest \ LoadStore1.stdout.exp LoadStore1.stdout.exp-LE LoadStore1.stderr.exp \ @@ -18,27 +21,25 @@ EXTRA_DIST = \ MIPS32int.stdout.exp-mips32-BE MIPS32int.stdout.exp-mips32r2-BE \ MIPS32int.stdout.exp-mips32-LE MIPS32int.stdout.exp-mips32r2-LE \ MIPS32int.stderr.exp MIPS32int.vgtest \ + mips32_dsp.stdout.exp-LE mips32_dsp.stdout.exp-BE \ + mips32_dsp.stderr.exp mips32_dsp.vgtest \ + mips32_dspr2.stdout.exp mips32_dspr2.stderr.exp \ + mips32_dspr2.vgtest \ MoveIns.stdout.exp MoveIns.stdout.exp-BE \ MoveIns.stdout.exp-mips32r2-BE MoveIns.stdout.exp-mips32r2-LE \ MoveIns.stderr.exp MoveIns.vgtest \ + round_fpu64.stdout.exp round_fpu64.stdout.exp-fpu32 \ + round_fpu64.stderr.exp round_fpu64.vgtest \ round.stdout.exp round.stderr.exp round.vgtest \ - vfp.stdout.exp-mips32-BE vfp.stdout.exp-mips32r2-BE \ - vfp.stdout.exp-mips32-LE vfp.stdout.exp-mips32r2-LE vfp.stderr.exp \ - vfp.vgtest \ SignalException.stderr.exp SignalException.vgtest \ - bug320057-mips32.stdout.exp bug320057-mips32.stderr.exp \ - bug320057-mips32.vgtest \ - mips32_dsp.stdout.exp-LE mips32_dsp.stdout.exp-BE \ - mips32_dsp.stderr.exp mips32_dsp.vgtest \ - mips32_dspr2.stdout.exp mips32_dspr2.stderr.exp \ - mips32_dspr2.vgtest \ - unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \ - unaligned_load_store.stderr.exp unaligned_load_store.vgtest \ test_fcsr.stdout.exp test_fcsr.stderr.exp test_fcsr.vgtest \ test_math.stdout.exp test_math.stderr.exp test_math.vgtest \ - round_fpu64.stdout.exp round_fpu64.stdout.exp-fpu32 \ - round_fpu64.stderr.exp round_fpu64.vgtest \ - fpu_branches.stdout.exp fpu_branches.stderr.exp fpu_branches.vgtest + unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \ + unaligned_load_store.stderr.exp unaligned_load_store.vgtest \ + vfp.stdout.exp-mips32-BE vfp.stdout.exp-mips32r2-BE \ + vfp.stdout.exp-mips32-LE vfp.stdout.exp-mips32r2-LE vfp.stderr.exp \ + vfp.stdout.exp-mips32r2-fpu_64-BE vfp.stdout.exp-mips32r2-fpu_64-LE \ + vfp.vgtest check_PROGRAMS = \ allexec \ diff --git a/none/tests/mips32/vfp.c b/none/tests/mips32/vfp.c index 68acfb6dd2..9412457bc1 100644 --- a/none/tests/mips32/vfp.c +++ b/none/tests/mips32/vfp.c @@ -1,5 +1,6 @@ #if defined(__mips_hard_float) - +#include +#include #include #include @@ -15,6 +16,18 @@ unsigned int mem[] = { 0x3FBF9ADD, 0x3746F65F }; +long long meml[] = { + 0x236457894095A266, 0x7777777766666666, + 0xBFF00000aaaaccde, 0x0004563217800000, + 0x3FF0556644770000, 0x0002255889900000, + 0x25254123698a2e2b, 0x21a2b3d6f62d2d2a, + 0xFFaabb22ccFFFFFF, 0x542698eeFFFFFFFF, + 0x41D2658041D26580, 0xB487E5C9B487E5C9, + 0x420774411aa26580, 0xaabbccddB750E388, + 0xffffeeee3E45798E, 0xccccccccE2308C3A, + 0x123abb983FBF9ADD, 0x002255443746F65F +}; + float fs_f[] = { 0, 456.2489562, 3, -1, 1384.6, -7.2945676, 1000000000, -5786.47, @@ -118,6 +131,22 @@ float mem1f[] = { instruction, (uint32_t)out, (uint32_t)(out >> 32)); \ } +// luxc1 $f0, $a3($v0) +#define TESTINSN6LOADlu(instruction, indexVal, fd, index, base) \ +{ \ + uint64_t out; \ + __asm__ volatile( \ + "move $" #base ", %0\n\t" \ + "li $" #index ", " #indexVal"\n\t" \ + instruction "\n\t" \ + "sdc1 $"#fd ", 0(%1)" \ + : : "r" (meml), "r" (&out) \ + : #base, #index, "$"#fd, "memory" \ + ); \ + printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \ + instruction, (uint32_t)out, (uint32_t)(out >> 32)); \ +} + // sdc1 $f0, 0($t0) #define TESTINST1(offset) \ { \ @@ -158,6 +187,28 @@ float mem1f[] = { out, out1); \ } +// SUXC1 $f0, $t2($t0) +#define TESTINST1b(offset, unligned_offset) \ +{ \ + unsigned int out; \ + unsigned int out1; \ + __asm__ volatile( \ + "move $t0, %2\n\t" \ + "move $t1, %3\n\t" \ + "li $t2, "#unligned_offset"\n\t" \ + "ldc1 $f0, "#offset"($t1)\n\t" \ + "suxc1 $f0, $t2($t0) \n\t" \ + "lw %0, "#offset"($t0)\n\t" \ + "addi $t0, $t0, 4 \n\t" \ + "lw %1, "#offset"($t0)\n\t" \ + : "=r" (out), "=r" (out1) \ + : "r" (mem1), "r" (fs_d) \ + : "t2", "t1", "t0", "$f0", "memory" \ + ); \ + printf("suxc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \ + out, out1); \ +} + // swc1 $f0, 0($t0) #define TESTINST2(offset) \ { \ @@ -195,6 +246,19 @@ float mem1f[] = { out); \ } +#define TEST_FPU64 \ + __asm__ __volatile__( \ + "cvt.l.s $f0, $f0" "\n\t" \ + : \ + : \ + : "$f0" \ + ); + +static void handler(int sig) +{ + exit(0); +} + void ppMem(double *m, int len) { int i; @@ -405,6 +469,66 @@ int main() ppMemF(mem1f, 16); #endif +#if (__mips==32) && (__mips_isa_rev>=2) && (__mips_fpr==64 || __mips_fpr==xx) + signal(SIGILL, handler); + /* Test fpu64 mode. */ + TEST_FPU64; + + printf("luxc1\n"); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); + TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); + + printf("SUXC1\n"); + TESTINST1b(0, 0); + TESTINST1b(0, 1); + TESTINST1b(8, 8); + TESTINST1b(8, 9); + TESTINST1b(16, 16); + TESTINST1b(16, 17); + TESTINST1b(24, 24); + TESTINST1b(24, 25); + TESTINST1b(32, 32); + TESTINST1b(32, 35); + TESTINST1b(40, 40); + TESTINST1b(40, 42); + TESTINST1b(48, 48); + TESTINST1b(48, 50); + TESTINST1b(56, 56); + TESTINST1b(56, 60); + TESTINST1b(64, 64); + TESTINST1b(64, 67); + ppMem(mem1, 16); +#endif return 0; } #else diff --git a/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-BE b/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-BE new file mode 100644 index 0000000000..7e6477fcc4 --- /dev/null +++ b/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-BE @@ -0,0 +1,239 @@ +LDC1 +ldc1 $f0, 0($t1) :: ft 0x666666664095a266 +ldc1 $f0, 8($t1) :: ft 0x0bff00000 +ldc1 $f0, 16($t1) :: ft 0x03ff00000 +ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b +ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff +ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580 +ldc1 $f0, 48($t1) :: ft 0xb750e38842026580 +ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e +ldc1 $f0, 64($t1) :: ft 0x3746f65f3fbf9add +ldc1 $f0, 0($t1) :: ft 0x666666664095a266 +ldc1 $f0, 8($t1) :: ft 0x0bff00000 +ldc1 $f0, 16($t1) :: ft 0x03ff00000 +ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b +ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff +ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580 +ldc1 $f0, 48($t1) :: ft 0xb750e38842026580 +ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e +ldc1 $f0, 0($t1) :: ft 0x666666664095a266 +ldc1 $f0, 8($t1) :: ft 0x0bff00000 +ldc1 $f0, 16($t1) :: ft 0x03ff00000 +ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b +ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff +ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580 +ldc1 $f0, 48($t1) :: ft 0xb750e38842026580 +ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e +ldc1 $f0, 64($t1) :: ft 0x3746f65f3fbf9add +ldc1 $f0, 0($t1) :: ft 0x666666664095a266 +LWC1 +lwc1 $f0, 0($t1) :: ft 0x4095a266 +lwc1 $f0, 4($t1) :: ft 0x66666666 +lwc1 $f0, 8($t1) :: ft 0xbff00000 +lwc1 $f0, 12($t1) :: ft 0x0 +lwc1 $f0, 16($t1) :: ft 0x3ff00000 +lwc1 $f0, 20($t1) :: ft 0x0 +lwc1 $f0, 24($t1) :: ft 0x252a2e2b +lwc1 $f0, 28($t1) :: ft 0x262d2d2a +lwc1 $f0, 32($t1) :: ft 0xffffffff +lwc1 $f0, 36($t1) :: ft 0xffffffff +lwc1 $f0, 40($t1) :: ft 0x41d26580 +lwc1 $f0, 44($t1) :: ft 0xb487e5c9 +lwc1 $f0, 48($t1) :: ft 0x42026580 +lwc1 $f0, 52($t1) :: ft 0xb750e388 +lwc1 $f0, 56($t1) :: ft 0x3e45798e +lwc1 $f0, 60($t1) :: ft 0xe2308c3a +lwc1 $f0, 64($t1) :: ft 0x3fbf9add +lwc1 $f0, 0($t1) :: ft 0x4095a266 +lwc1 $f0, 8($t1) :: ft 0xbff00000 +lwc1 $f0, 16($t1) :: ft 0x3ff00000 +lwc1 $f0, 24($t1) :: ft 0x252a2e2b +lwc1 $f0, 32($t1) :: ft 0xffffffff +lwc1 $f0, 40($t1) :: ft 0x41d26580 +lwc1 $f0, 48($t1) :: ft 0x42026580 +lwc1 $f0, 56($t1) :: ft 0x3e45798e +lwc1 $f0, 64($t1) :: ft 0x3fbf9add +lwc1 $f0, 0($t1) :: ft 0x4095a266 +LWXC1 +lwxc1 $f0, $a3($v0) :: ft 0x4095a266 +lwxc1 $f0, $a3($v0) :: ft 0x66666666 +lwxc1 $f0, $a3($v0) :: ft 0xbff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x3ff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b +lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0x41d26580 +lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9 +lwxc1 $f0, $a3($v0) :: ft 0x42026580 +lwxc1 $f0, $a3($v0) :: ft 0xb750e388 +lwxc1 $f0, $a3($v0) :: ft 0x3e45798e +lwxc1 $f0, $a3($v0) :: ft 0xe2308c3a +lwxc1 $f0, $a3($v0) :: ft 0x3fbf9add +lwxc1 $f0, $a3($v0) :: ft 0x4095a266 +lwxc1 $f0, $a3($v0) :: ft 0x66666666 +lwxc1 $f0, $a3($v0) :: ft 0xbff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x3ff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b +lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0x41d26580 +lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9 +lwxc1 $f0, $a3($v0) :: ft 0x42026580 +lwxc1 $f0, $a3($v0) :: ft 0xb750e388 +lwxc1 $f0, $a3($v0) :: ft 0x3e45798e +LDXC1 +ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +ldxc1 $f0, $a3($v0) :: ft lo: 0xb487e5c9, ft hi: 0x41d26580 +ldxc1 $f0, $a3($v0) :: ft lo: 0xb750e388, ft hi: 0x42026580 +ldxc1 $f0, $a3($v0) :: ft lo: 0xe2308c3a, ft hi: 0x3e45798e +ldxc1 $f0, $a3($v0) :: ft lo: 0x3746f65f, ft hi: 0x3fbf9add +ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +ldxc1 $f0, $a3($v0) :: ft lo: 0xb487e5c9, ft hi: 0x41d26580 +ldxc1 $f0, $a3($v0) :: ft lo: 0xb750e388, ft hi: 0x42026580 +ldxc1 $f0, $a3($v0) :: ft lo: 0xe2308c3a, ft hi: 0x3e45798e +ldxc1 $f0, $a3($v0) :: ft lo: 0x3746f65f, ft hi: 0x3fbf9add +ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +ldxc1 $f0, $a3($v0) :: ft lo: 0xb487e5c9, ft hi: 0x41d26580 +ldxc1 $f0, $a3($v0) :: ft lo: 0xb750e388, ft hi: 0x42026580 +ldxc1 $f0, $a3($v0) :: ft lo: 0xe2308c3a, ft hi: 0x3e45798e +ldxc1 $f0, $a3($v0) :: ft lo: 0x3746f65f, ft hi: 0x3fbf9add +ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000 +ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +SDC1 +sdc1 $f0, 0($t0) :: out: 0x0 +sdc1 $f0, 0($t0) :: out: 0x407c83fb +sdc1 $f0, 0($t0) :: out: 0x40080000 +sdc1 $f0, 0($t0) :: out: 0xbff00000 +sdc1 $f0, 0($t0) :: out: 0x4095a266 +sdc1 $f0, 0($t0) :: out: 0xc01d2da3 +sdc1 $f0, 0($t0) :: out: 0x41cdcd65 +sdc1 $f0, 0($t0) :: out: 0xc0b69a78 +sdc1 $f0, 0($t0) :: out: 0x409b6000 +MEM1: +0.000000, 456.248956, 3.000000, -1.000000 +1384.600000, -7.294568, 1000000000.000000, -5786.470000 +1752.000000, 0.000000, 0.000000, 0.000000 +0.000000, 0.000000, 0.000000, 0.000000 +SDXC1 +sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0 +sdc1 $f0, #t2($t0) :: out: 0x407c83fb : out1: 0xb97f122f +sdc1 $f0, #t2($t0) :: out: 0x40080000 : out1: 0x0 +sdc1 $f0, #t2($t0) :: out: 0xbff00000 : out1: 0x0 +sdc1 $f0, #t2($t0) :: out: 0x4095a266 : out1: 0x66666666 +sdc1 $f0, #t2($t0) :: out: 0xc01d2da3 : out1: 0x2101d847 +sdc1 $f0, #t2($t0) :: out: 0x41cdcd65 : out1: 0x0 +sdc1 $f0, #t2($t0) :: out: 0xc0b69a78 : out1: 0x51eb851f +sdc1 $f0, #t2($t0) :: out: 0x409b6000 : out1: 0x0 +MEM1: +0.000000, 456.248956, 3.000000, -1.000000 +1384.600000, -7.294568, 1000000000.000000, -5786.470000 +1752.000000, 0.000000, 0.000000, 0.000000 +0.000000, 0.000000, 0.000000, 0.000000 +SWC1 +swc1 $f0, 0($t0) :: out: 0x0 +swc1 $f0, 0($t0) :: out: 0x40400000 +swc1 $f0, 0($t0) :: out: 0x44ad1333 +swc1 $f0, 0($t0) :: out: 0x4e6e6b28 +swc1 $f0, 0($t0) :: out: 0x44db0000 +swc1 $f0, 0($t0) :: out: 0x322bcc77 +swc1 $f0, 0($t0) :: out: 0xc732da7a +swc1 $f0, 0($t0) :: out: 0x42080079 +swc1 $f0, 0($t0) :: out: 0x49d5e008 +MEM1: +0.000000, 0.000000, 3.000000, 0.000000 +1384.599976, 0.000000, 1000000000.000000, 0.000000 +1752.000000, 0.000000, 0.000000, 0.000000 +-45786.476562, 0.000000, 34.000462, 0.000000 +SWXC1 +swxc1 $f0, 0($t0) :: out: 0x0 +swxc1 $f0, 0($t0) :: out: 0x40400000 +swxc1 $f0, 0($t0) :: out: 0x44ad1333 +swxc1 $f0, 0($t0) :: out: 0x4e6e6b28 +swxc1 $f0, 0($t0) :: out: 0x44db0000 +swxc1 $f0, 0($t0) :: out: 0x322bcc77 +swxc1 $f0, 0($t0) :: out: 0xc732da7a +swxc1 $f0, 0($t0) :: out: 0x42080079 +swxc1 $f0, 0($t0) :: out: 0x49d5e008 +MEM1: +0.000000, 0.000000, 3.000000, 0.000000 +1384.599976, 0.000000, 1000000000.000000, 0.000000 +1752.000000, 0.000000, 0.000000, 0.000000 +-45786.476562, 0.000000, 34.000462, 0.000000 +luxc1 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +luxc1 $f0, $a3($v0) :: ft lo: 0x89900000, ft hi: 0x22558 +luxc1 $f0, $a3($v0) :: ft lo: 0x698a2e2b, ft hi: 0x25254123 +luxc1 $f0, $a3($v0) :: ft lo: 0xf62d2d2a, ft hi: 0x21a2b3d6 +luxc1 $f0, $a3($v0) :: ft lo: 0xccffffff, ft hi: 0xffaabb22 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +luxc1 $f0, $a3($v0) :: ft lo: 0x89900000, ft hi: 0x22558 +luxc1 $f0, $a3($v0) :: ft lo: 0x698a2e2b, ft hi: 0x25254123 +luxc1 $f0, $a3($v0) :: ft lo: 0xf62d2d2a, ft hi: 0x21a2b3d6 +luxc1 $f0, $a3($v0) :: ft lo: 0xccffffff, ft hi: 0xffaabb22 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +luxc1 $f0, $a3($v0) :: ft lo: 0x89900000, ft hi: 0x22558 +luxc1 $f0, $a3($v0) :: ft lo: 0x698a2e2b, ft hi: 0x25254123 +luxc1 $f0, $a3($v0) :: ft lo: 0xf62d2d2a, ft hi: 0x21a2b3d6 +luxc1 $f0, $a3($v0) :: ft lo: 0xccffffff, ft hi: 0xffaabb22 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +SUXC1 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x407c83fb : out1: 0xb97f122f +suxc1 $f0, #t2($t0) :: out: 0x407c83fb : out1: 0xb97f122f +suxc1 $f0, #t2($t0) :: out: 0x40080000 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x40080000 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0xbff00000 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0xbff00000 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x4095a266 : out1: 0x66666666 +suxc1 $f0, #t2($t0) :: out: 0x4095a266 : out1: 0x66666666 +suxc1 $f0, #t2($t0) :: out: 0xc01d2da3 : out1: 0x2101d847 +suxc1 $f0, #t2($t0) :: out: 0xc01d2da3 : out1: 0x2101d847 +suxc1 $f0, #t2($t0) :: out: 0x41cdcd65 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x41cdcd65 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0xc0b69a78 : out1: 0x51eb851f +suxc1 $f0, #t2($t0) :: out: 0xc0b69a78 : out1: 0x51eb851f +suxc1 $f0, #t2($t0) :: out: 0x409b6000 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x409b6000 : out1: 0x0 +MEM1: +0.000000, 456.248956, 3.000000, -1.000000 +1384.600000, -7.294568, 1000000000.000000, -5786.470000 +1752.000000, 0.000000, 0.000000, 0.000000 +0.000000, 0.000000, 0.000000, 0.000000 \ No newline at end of file diff --git a/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-LE b/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-LE new file mode 100644 index 0000000000..d63c5353a4 --- /dev/null +++ b/none/tests/mips32/vfp.stdout.exp-mips32r2-fpu_64-LE @@ -0,0 +1,239 @@ +LDC1 +ldc1 $f0, 0($t1) :: ft 0x4095a26666666666 +ldc1 $f0, 8($t1) :: ft 0xbff000000 +ldc1 $f0, 16($t1) :: ft 0x3ff000000 +ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a +ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff +ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9 +ldc1 $f0, 48($t1) :: ft 0x42026580b750e388 +ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a +ldc1 $f0, 64($t1) :: ft 0x3fbf9add3746f65f +ldc1 $f0, 0($t1) :: ft 0x4095a26666666666 +ldc1 $f0, 8($t1) :: ft 0xbff000000 +ldc1 $f0, 16($t1) :: ft 0x3ff000000 +ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a +ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff +ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9 +ldc1 $f0, 48($t1) :: ft 0x42026580b750e388 +ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a +ldc1 $f0, 0($t1) :: ft 0x4095a26666666666 +ldc1 $f0, 8($t1) :: ft 0xbff000000 +ldc1 $f0, 16($t1) :: ft 0x3ff000000 +ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a +ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff +ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9 +ldc1 $f0, 48($t1) :: ft 0x42026580b750e388 +ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a +ldc1 $f0, 64($t1) :: ft 0x3fbf9add3746f65f +ldc1 $f0, 0($t1) :: ft 0x4095a26666666666 +LWC1 +lwc1 $f0, 0($t1) :: ft 0x4095a266 +lwc1 $f0, 4($t1) :: ft 0x66666666 +lwc1 $f0, 8($t1) :: ft 0xbff00000 +lwc1 $f0, 12($t1) :: ft 0x0 +lwc1 $f0, 16($t1) :: ft 0x3ff00000 +lwc1 $f0, 20($t1) :: ft 0x0 +lwc1 $f0, 24($t1) :: ft 0x252a2e2b +lwc1 $f0, 28($t1) :: ft 0x262d2d2a +lwc1 $f0, 32($t1) :: ft 0xffffffff +lwc1 $f0, 36($t1) :: ft 0xffffffff +lwc1 $f0, 40($t1) :: ft 0x41d26580 +lwc1 $f0, 44($t1) :: ft 0xb487e5c9 +lwc1 $f0, 48($t1) :: ft 0x42026580 +lwc1 $f0, 52($t1) :: ft 0xb750e388 +lwc1 $f0, 56($t1) :: ft 0x3e45798e +lwc1 $f0, 60($t1) :: ft 0xe2308c3a +lwc1 $f0, 64($t1) :: ft 0x3fbf9add +lwc1 $f0, 0($t1) :: ft 0x4095a266 +lwc1 $f0, 8($t1) :: ft 0xbff00000 +lwc1 $f0, 16($t1) :: ft 0x3ff00000 +lwc1 $f0, 24($t1) :: ft 0x252a2e2b +lwc1 $f0, 32($t1) :: ft 0xffffffff +lwc1 $f0, 40($t1) :: ft 0x41d26580 +lwc1 $f0, 48($t1) :: ft 0x42026580 +lwc1 $f0, 56($t1) :: ft 0x3e45798e +lwc1 $f0, 64($t1) :: ft 0x3fbf9add +lwc1 $f0, 0($t1) :: ft 0x4095a266 +LWXC1 +lwxc1 $f0, $a3($v0) :: ft 0x4095a266 +lwxc1 $f0, $a3($v0) :: ft 0x66666666 +lwxc1 $f0, $a3($v0) :: ft 0xbff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x3ff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b +lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0x41d26580 +lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9 +lwxc1 $f0, $a3($v0) :: ft 0x42026580 +lwxc1 $f0, $a3($v0) :: ft 0xb750e388 +lwxc1 $f0, $a3($v0) :: ft 0x3e45798e +lwxc1 $f0, $a3($v0) :: ft 0xe2308c3a +lwxc1 $f0, $a3($v0) :: ft 0x3fbf9add +lwxc1 $f0, $a3($v0) :: ft 0x4095a266 +lwxc1 $f0, $a3($v0) :: ft 0x66666666 +lwxc1 $f0, $a3($v0) :: ft 0xbff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x3ff00000 +lwxc1 $f0, $a3($v0) :: ft 0x0 +lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b +lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0xffffffff +lwxc1 $f0, $a3($v0) :: ft 0x41d26580 +lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9 +lwxc1 $f0, $a3($v0) :: ft 0x42026580 +lwxc1 $f0, $a3($v0) :: ft 0xb750e388 +lwxc1 $f0, $a3($v0) :: ft 0x3e45798e +LDXC1 +ldxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x66666666 +ldxc1 $f0, $a3($v0) :: ft lo: 0xbff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3ff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x252a2e2b, ft hi: 0x262d2d2a +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +ldxc1 $f0, $a3($v0) :: ft lo: 0x41d26580, ft hi: 0xb487e5c9 +ldxc1 $f0, $a3($v0) :: ft lo: 0x42026580, ft hi: 0xb750e388 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3e45798e, ft hi: 0xe2308c3a +ldxc1 $f0, $a3($v0) :: ft lo: 0x3fbf9add, ft hi: 0x3746f65f +ldxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x66666666 +ldxc1 $f0, $a3($v0) :: ft lo: 0xbff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3ff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x252a2e2b, ft hi: 0x262d2d2a +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +ldxc1 $f0, $a3($v0) :: ft lo: 0x41d26580, ft hi: 0xb487e5c9 +ldxc1 $f0, $a3($v0) :: ft lo: 0x42026580, ft hi: 0xb750e388 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3e45798e, ft hi: 0xe2308c3a +ldxc1 $f0, $a3($v0) :: ft lo: 0x3fbf9add, ft hi: 0x3746f65f +ldxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x66666666 +ldxc1 $f0, $a3($v0) :: ft lo: 0xbff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3ff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x252a2e2b, ft hi: 0x262d2d2a +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +ldxc1 $f0, $a3($v0) :: ft lo: 0x41d26580, ft hi: 0xb487e5c9 +ldxc1 $f0, $a3($v0) :: ft lo: 0x42026580, ft hi: 0xb750e388 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3e45798e, ft hi: 0xe2308c3a +ldxc1 $f0, $a3($v0) :: ft lo: 0x3fbf9add, ft hi: 0x3746f65f +ldxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x66666666 +ldxc1 $f0, $a3($v0) :: ft lo: 0xbff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x3ff00000, ft hi: 0x0 +ldxc1 $f0, $a3($v0) :: ft lo: 0x252a2e2b, ft hi: 0x262d2d2a +ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff +SDC1 +sdc1 $f0, 0($t0) :: out: 0x0 +sdc1 $f0, 0($t0) :: out: 0xb97f122f +sdc1 $f0, 0($t0) :: out: 0x0 +sdc1 $f0, 0($t0) :: out: 0x0 +sdc1 $f0, 0($t0) :: out: 0x66666666 +sdc1 $f0, 0($t0) :: out: 0x2101d847 +sdc1 $f0, 0($t0) :: out: 0x0 +sdc1 $f0, 0($t0) :: out: 0x51eb851f +sdc1 $f0, 0($t0) :: out: 0x0 +MEM1: +0.000000, 456.248956, 3.000000, -1.000000 +1384.600000, -7.294568, 1000000000.000000, -5786.470000 +1752.000000, 0.000000, 0.000000, 0.000000 +0.000000, 0.000000, 0.000000, 0.000000 +SDXC1 +sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0 +sdc1 $f0, #t2($t0) :: out: 0xb97f122f : out1: 0x407c83fb +sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x40080000 +sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0xbff00000 +sdc1 $f0, #t2($t0) :: out: 0x66666666 : out1: 0x4095a266 +sdc1 $f0, #t2($t0) :: out: 0x2101d847 : out1: 0xc01d2da3 +sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x41cdcd65 +sdc1 $f0, #t2($t0) :: out: 0x51eb851f : out1: 0xc0b69a78 +sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x409b6000 +MEM1: +0.000000, 456.248956, 3.000000, -1.000000 +1384.600000, -7.294568, 1000000000.000000, -5786.470000 +1752.000000, 0.000000, 0.000000, 0.000000 +0.000000, 0.000000, 0.000000, 0.000000 +SWC1 +swc1 $f0, 0($t0) :: out: 0x0 +swc1 $f0, 0($t0) :: out: 0x40400000 +swc1 $f0, 0($t0) :: out: 0x44ad1333 +swc1 $f0, 0($t0) :: out: 0x4e6e6b28 +swc1 $f0, 0($t0) :: out: 0x44db0000 +swc1 $f0, 0($t0) :: out: 0x322bcc77 +swc1 $f0, 0($t0) :: out: 0xc732da7a +swc1 $f0, 0($t0) :: out: 0x42080079 +swc1 $f0, 0($t0) :: out: 0x49d5e008 +MEM1: +0.000000, 0.000000, 3.000000, 0.000000 +1384.599976, 0.000000, 1000000000.000000, 0.000000 +1752.000000, 0.000000, 0.000000, 0.000000 +-45786.476562, 0.000000, 34.000462, 0.000000 +SWXC1 +swxc1 $f0, 0($t0) :: out: 0x0 +swxc1 $f0, 0($t0) :: out: 0x40400000 +swxc1 $f0, 0($t0) :: out: 0x44ad1333 +swxc1 $f0, 0($t0) :: out: 0x4e6e6b28 +swxc1 $f0, 0($t0) :: out: 0x44db0000 +swxc1 $f0, 0($t0) :: out: 0x322bcc77 +swxc1 $f0, 0($t0) :: out: 0xc732da7a +swxc1 $f0, 0($t0) :: out: 0x42080079 +swxc1 $f0, 0($t0) :: out: 0x49d5e008 +MEM1: +0.000000, 0.000000, 3.000000, 0.000000 +1384.599976, 0.000000, 1000000000.000000, 0.000000 +1752.000000, 0.000000, 0.000000, 0.000000 +-45786.476562, 0.000000, 34.000462, 0.000000 +luxc1 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +luxc1 $f0, $a3($v0) :: ft lo: 0x89900000, ft hi: 0x22558 +luxc1 $f0, $a3($v0) :: ft lo: 0x698a2e2b, ft hi: 0x25254123 +luxc1 $f0, $a3($v0) :: ft lo: 0xf62d2d2a, ft hi: 0x21a2b3d6 +luxc1 $f0, $a3($v0) :: ft lo: 0xccffffff, ft hi: 0xffaabb22 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +luxc1 $f0, $a3($v0) :: ft lo: 0x89900000, ft hi: 0x22558 +luxc1 $f0, $a3($v0) :: ft lo: 0x698a2e2b, ft hi: 0x25254123 +luxc1 $f0, $a3($v0) :: ft lo: 0xf62d2d2a, ft hi: 0x21a2b3d6 +luxc1 $f0, $a3($v0) :: ft lo: 0xccffffff, ft hi: 0xffaabb22 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +luxc1 $f0, $a3($v0) :: ft lo: 0x89900000, ft hi: 0x22558 +luxc1 $f0, $a3($v0) :: ft lo: 0x698a2e2b, ft hi: 0x25254123 +luxc1 $f0, $a3($v0) :: ft lo: 0xf62d2d2a, ft hi: 0x21a2b3d6 +luxc1 $f0, $a3($v0) :: ft lo: 0xccffffff, ft hi: 0xffaabb22 +luxc1 $f0, $a3($v0) :: ft lo: 0x4095a266, ft hi: 0x23645789 +luxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x77777777 +luxc1 $f0, $a3($v0) :: ft lo: 0xaaaaccde, ft hi: 0xbff00000 +luxc1 $f0, $a3($v0) :: ft lo: 0x17800000, ft hi: 0x45632 +luxc1 $f0, $a3($v0) :: ft lo: 0x44770000, ft hi: 0x3ff05566 +SUXC1 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0 +suxc1 $f0, #t2($t0) :: out: 0xb97f122f : out1: 0x407c83fb +suxc1 $f0, #t2($t0) :: out: 0xb97f122f : out1: 0x407c83fb +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x40080000 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x40080000 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0xbff00000 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0xbff00000 +suxc1 $f0, #t2($t0) :: out: 0x66666666 : out1: 0x4095a266 +suxc1 $f0, #t2($t0) :: out: 0x66666666 : out1: 0x4095a266 +suxc1 $f0, #t2($t0) :: out: 0x2101d847 : out1: 0xc01d2da3 +suxc1 $f0, #t2($t0) :: out: 0x2101d847 : out1: 0xc01d2da3 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x41cdcd65 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x41cdcd65 +suxc1 $f0, #t2($t0) :: out: 0x51eb851f : out1: 0xc0b69a78 +suxc1 $f0, #t2($t0) :: out: 0x51eb851f : out1: 0xc0b69a78 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x409b6000 +suxc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x409b6000 +MEM1: +0.000000, 456.248956, 3.000000, -1.000000 +1384.600000, -7.294568, 1000000000.000000, -5786.470000 +1752.000000, 0.000000, 0.000000, 0.000000 +0.000000, 0.000000, 0.000000, 0.000000 -- 2.47.2