From 828114aacdd2641b23151e9ed65f444651a6e5fb Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Tue, 18 May 2004 05:07:52 +0000 Subject: [PATCH] backport: re PR target/15301 ([3.3/3.4 only] gcc does not pass __m128 arguments correctly) 2004-05-17 H.J. Lu Backport from mainline PR debug/15301 PR debug/15302 2004-05-17 Jan Hubicka * i386.c (construct_container): Do not produce BLKmode registers. (classify_argument): Properly compute alignment of complex types. From-SVN: r81971 --- gcc/ChangeLog | 10 ++++++++++ gcc/config/i386/i386.c | 8 ++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3e793dacb78c..c7399e5fd7dd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2004-05-17 H.J. Lu + + Backport from mainline + + PR debug/15301 + PR debug/15302 + 2004-05-17 Jan Hubicka + + * i386.c (construct_container): Do not produce BLKmode registers. + (classify_argument): Properly compute alignment of complex types. 2004-04-17 Eric Botcazou PR optimization/11841 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 171e9b6b1b78..74e86a3c21d5 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1914,6 +1914,8 @@ classify_argument (mode, type, classes, bit_offset) mode_alignment = 128; else if (mode == XCmode) mode_alignment = 256; + if (COMPLEX_MODE_P (mode)) + mode_alignment /= 2; /* Misaligned fields are always returned in memory. */ if (bit_offset % mode_alignment) return 0; @@ -2095,7 +2097,8 @@ construct_container (mode, type, in_return, nintregs, nsseregs, intreg, sse_regn default: abort (); } - if (n == 2 && class[0] == X86_64_SSE_CLASS && class[1] == X86_64_SSEUP_CLASS) + if (n == 2 && class[0] == X86_64_SSE_CLASS && class[1] == X86_64_SSEUP_CLASS + && mode != BLKmode) return gen_rtx_REG (mode, SSE_REGNO (sse_regno)); if (n == 2 && class[0] == X86_64_X87_CLASS && class[1] == X86_64_X87UP_CLASS) @@ -2107,7 +2110,8 @@ construct_container (mode, type, in_return, nintregs, nsseregs, intreg, sse_regn return gen_rtx_REG (mode, intreg[0]); if (n == 4 && class[0] == X86_64_X87_CLASS && class[1] == X86_64_X87UP_CLASS - && class[2] == X86_64_X87_CLASS && class[3] == X86_64_X87UP_CLASS) + && class[2] == X86_64_X87_CLASS && class[3] == X86_64_X87UP_CLASS + && mode != BLKmode) return gen_rtx_REG (TCmode, FIRST_STACK_REG); /* Otherwise figure out the entries of the PARALLEL. */ -- 2.47.2