From 840a8566f72d223d2565c42c76ddc1a272ca8b1c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sat, 27 Jan 2024 15:34:47 -0800 Subject: [PATCH] 6.7-stable patches added patches: drm-amd-amdgpu-assign-gart-pages-to-amd-device-mapping.patch drm-amd-display-align-the-returned-error-code-with-legacy-dp.patch drm-amd-display-fix-a-debugfs-null-pointer-error.patch drm-amd-display-fix-a-switch-statement-in-populate_dml_output_cfg_from_stream_state.patch drm-amd-display-fix-dml2-watermark-calculation.patch drm-amd-display-fix-late-derefrence-dsc-check-in-link_set_dsc_pps_packet.patch drm-amd-display-fix-uninitialized-variable-usage-in-core_link_-read_dpcd-write_dpcd-functions.patch drm-amd-display-fix-variable-deferencing-before-null-check-in-edp_setup_replay.patch drm-amd-display-port-dentist-hang-and-tdr-fixes-to-otg-disable-w-a.patch drm-amd-pm-add-error-log-for-smu-v13.0.6-reset.patch drm-amd-pm-fetch-current-power-limit-from-fw.patch drm-amd-pm-fix-smuv13.0.6-current-clock-reporting.patch drm-amd-pm-update-the-power-cap-setting.patch drm-amdgpu-avoid-fetching-vram-vendor-information.patch drm-amdgpu-correct-the-cu-count-for-gfx-v11.patch drm-amdgpu-drop-exp-hw-support-check-for-gc-9.4.3.patch drm-amdgpu-enable-gfxoff-for-compute-on-gfx11.patch drm-amdgpu-pm-fix-the-power-source-flag-error.patch drm-amdgpu-show-vram-vendor-only-if-available.patch drm-amdgpu-update-reggl2c_ctrl4-value-in-golden-setting.patch drm-bridge-nxp-ptn3460-simplify-some-error-checking.patch revert-drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch --- ...ign-gart-pages-to-amd-device-mapping.patch | 62 ++++++ ...e-returned-error-code-with-legacy-dp.patch | 44 ++++ ...lay-fix-a-debugfs-null-pointer-error.patch | 45 +++++ ...ate_dml_output_cfg_from_stream_state.patch | 34 ++++ ...splay-fix-dml2-watermark-calculation.patch | 52 +++++ ...dsc-check-in-link_set_dsc_pps_packet.patch | 50 +++++ ...link_-read_dpcd-write_dpcd-functions.patch | 53 +++++ ...efore-null-check-in-edp_setup_replay.patch | 63 ++++++ ...ang-and-tdr-fixes-to-otg-disable-w-a.patch | 83 ++++++++ ...-add-error-log-for-smu-v13.0.6-reset.patch | 46 +++++ ...pm-fetch-current-power-limit-from-fw.patch | 31 +++ ...x-smuv13.0.6-current-clock-reporting.patch | 35 ++++ ...-amd-pm-update-the-power-cap-setting.patch | 190 ++++++++++++++++++ ...oid-fetching-vram-vendor-information.patch | 33 +++ ...gpu-correct-the-cu-count-for-gfx-v11.patch | 33 +++ ...op-exp-hw-support-check-for-gc-9.4.3.patch | 30 +++ ...u-enable-gfxoff-for-compute-on-gfx11.patch | 48 +++++ ...u-pm-fix-the-power-source-flag-error.patch | 84 ++++++++ ...u-show-vram-vendor-only-if-available.patch | 52 +++++ ...eggl2c_ctrl4-value-in-golden-setting.patch | 31 +++ ...ptn3460-simplify-some-error-checking.patch | 62 ++++++ ...dwidth-validation-failure-on-dcn-2.1.patch | 46 +++++ queue-6.7/series | 22 ++ 23 files changed, 1229 insertions(+) create mode 100644 queue-6.7/drm-amd-amdgpu-assign-gart-pages-to-amd-device-mapping.patch create mode 100644 queue-6.7/drm-amd-display-align-the-returned-error-code-with-legacy-dp.patch create mode 100644 queue-6.7/drm-amd-display-fix-a-debugfs-null-pointer-error.patch create mode 100644 queue-6.7/drm-amd-display-fix-a-switch-statement-in-populate_dml_output_cfg_from_stream_state.patch create mode 100644 queue-6.7/drm-amd-display-fix-dml2-watermark-calculation.patch create mode 100644 queue-6.7/drm-amd-display-fix-late-derefrence-dsc-check-in-link_set_dsc_pps_packet.patch create mode 100644 queue-6.7/drm-amd-display-fix-uninitialized-variable-usage-in-core_link_-read_dpcd-write_dpcd-functions.patch create mode 100644 queue-6.7/drm-amd-display-fix-variable-deferencing-before-null-check-in-edp_setup_replay.patch create mode 100644 queue-6.7/drm-amd-display-port-dentist-hang-and-tdr-fixes-to-otg-disable-w-a.patch create mode 100644 queue-6.7/drm-amd-pm-add-error-log-for-smu-v13.0.6-reset.patch create mode 100644 queue-6.7/drm-amd-pm-fetch-current-power-limit-from-fw.patch create mode 100644 queue-6.7/drm-amd-pm-fix-smuv13.0.6-current-clock-reporting.patch create mode 100644 queue-6.7/drm-amd-pm-update-the-power-cap-setting.patch create mode 100644 queue-6.7/drm-amdgpu-avoid-fetching-vram-vendor-information.patch create mode 100644 queue-6.7/drm-amdgpu-correct-the-cu-count-for-gfx-v11.patch create mode 100644 queue-6.7/drm-amdgpu-drop-exp-hw-support-check-for-gc-9.4.3.patch create mode 100644 queue-6.7/drm-amdgpu-enable-gfxoff-for-compute-on-gfx11.patch create mode 100644 queue-6.7/drm-amdgpu-pm-fix-the-power-source-flag-error.patch create mode 100644 queue-6.7/drm-amdgpu-show-vram-vendor-only-if-available.patch create mode 100644 queue-6.7/drm-amdgpu-update-reggl2c_ctrl4-value-in-golden-setting.patch create mode 100644 queue-6.7/drm-bridge-nxp-ptn3460-simplify-some-error-checking.patch create mode 100644 queue-6.7/revert-drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch diff --git a/queue-6.7/drm-amd-amdgpu-assign-gart-pages-to-amd-device-mapping.patch b/queue-6.7/drm-amd-amdgpu-assign-gart-pages-to-amd-device-mapping.patch new file mode 100644 index 00000000000..fb8f8f5a636 --- /dev/null +++ b/queue-6.7/drm-amd-amdgpu-assign-gart-pages-to-amd-device-mapping.patch @@ -0,0 +1,62 @@ +From e7a8594cc2af920a905db15653c19c362d4ebd3f Mon Sep 17 00:00:00 2001 +From: Tom St Denis +Date: Wed, 17 Jan 2024 12:47:37 -0500 +Subject: drm/amd/amdgpu: Assign GART pages to AMD device mapping +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Tom St Denis + +commit e7a8594cc2af920a905db15653c19c362d4ebd3f upstream. + +This allows kernel mapped pages like the PDB and PTB to be +read via the iomem debugfs when there is no vram in the system. + +Signed-off-by: Tom St Denis +Reviewed-by: Christian König +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +@@ -121,6 +121,7 @@ int amdgpu_gart_table_ram_alloc(struct a + struct amdgpu_bo_param bp; + dma_addr_t dma_addr; + struct page *p; ++ unsigned long x; + int ret; + + if (adev->gart.bo != NULL) +@@ -130,6 +131,10 @@ int amdgpu_gart_table_ram_alloc(struct a + if (!p) + return -ENOMEM; + ++ /* assign pages to this device */ ++ for (x = 0; x < (1UL << order); x++) ++ p[x].mapping = adev->mman.bdev.dev_mapping; ++ + /* If the hardware does not support UTCL2 snooping of the CPU caches + * then set_memory_wc() could be used as a workaround to mark the pages + * as write combine memory. +@@ -223,6 +228,7 @@ void amdgpu_gart_table_ram_free(struct a + unsigned int order = get_order(adev->gart.table_size); + struct sg_table *sg = adev->gart.bo->tbo.sg; + struct page *p; ++ unsigned long x; + int ret; + + ret = amdgpu_bo_reserve(adev->gart.bo, false); +@@ -234,6 +240,8 @@ void amdgpu_gart_table_ram_free(struct a + sg_free_table(sg); + kfree(sg); + p = virt_to_page(adev->gart.ptr); ++ for (x = 0; x < (1UL << order); x++) ++ p[x].mapping = NULL; + __free_pages(p, order); + + adev->gart.ptr = NULL; diff --git a/queue-6.7/drm-amd-display-align-the-returned-error-code-with-legacy-dp.patch b/queue-6.7/drm-amd-display-align-the-returned-error-code-with-legacy-dp.patch new file mode 100644 index 00000000000..2696f101f0a --- /dev/null +++ b/queue-6.7/drm-amd-display-align-the-returned-error-code-with-legacy-dp.patch @@ -0,0 +1,44 @@ +From bfe79f5fff1300d96203383582b078c7b0aec80a Mon Sep 17 00:00:00 2001 +From: Wayne Lin +Date: Tue, 2 Jan 2024 14:20:37 +0800 +Subject: drm/amd/display: Align the returned error code with legacy DP + +From: Wayne Lin + +commit bfe79f5fff1300d96203383582b078c7b0aec80a upstream. + +[Why] +For usb4 connector, AUX transaction is handled by dmub utilizing a differnt +code path comparing to legacy DP connector. If the usb4 DP connector is +disconnected, AUX access will report EBUSY and cause igt@kms_dp_aux_dev +fail. + +[How] +Align the error code with the one reported by legacy DP as EIO. + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Acked-by: Alex Hung +Signed-off-by: Wayne Lin +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +@@ -965,6 +965,11 @@ int dm_helper_dmub_aux_transfer_sync( + struct aux_payload *payload, + enum aux_return_code_type *operation_result) + { ++ if (!link->hpd_status) { ++ *operation_result = AUX_RET_ERROR_HPD_DISCON; ++ return -1; ++ } ++ + return amdgpu_dm_process_dmub_aux_transfer_sync(ctx, link->link_index, payload, + operation_result); + } diff --git a/queue-6.7/drm-amd-display-fix-a-debugfs-null-pointer-error.patch b/queue-6.7/drm-amd-display-fix-a-debugfs-null-pointer-error.patch new file mode 100644 index 00000000000..7b452b4f6a4 --- /dev/null +++ b/queue-6.7/drm-amd-display-fix-a-debugfs-null-pointer-error.patch @@ -0,0 +1,45 @@ +From efb91fea652a42fcc037d2a9ef4ecd1ffc5ff4b7 Mon Sep 17 00:00:00 2001 +From: Aurabindo Pillai +Date: Fri, 27 Oct 2023 15:59:48 -0400 +Subject: drm/amd/display: Fix a debugfs null pointer error + +From: Aurabindo Pillai + +commit efb91fea652a42fcc037d2a9ef4ecd1ffc5ff4b7 upstream. + +[WHY & HOW] +Check whether get_subvp_en() callback exists before calling it. + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Reviewed-by: Alex Hung +Acked-by: Alex Hung +Signed-off-by: Aurabindo Pillai +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c +@@ -3647,12 +3647,16 @@ static int capabilities_show(struct seq_ + bool mall_supported = dc->caps.mall_size_total; + bool subvp_supported = dc->caps.subvp_fw_processing_delay_us; + unsigned int mall_in_use = false; +- unsigned int subvp_in_use = dc->cap_funcs.get_subvp_en(dc, dc->current_state); ++ unsigned int subvp_in_use = false; ++ + struct hubbub *hubbub = dc->res_pool->hubbub; + + if (hubbub->funcs->get_mall_en) + hubbub->funcs->get_mall_en(hubbub, &mall_in_use); + ++ if (dc->cap_funcs.get_subvp_en) ++ subvp_in_use = dc->cap_funcs.get_subvp_en(dc, dc->current_state); ++ + seq_printf(m, "mall supported: %s, enabled: %s\n", + mall_supported ? "yes" : "no", mall_in_use ? "yes" : "no"); + seq_printf(m, "sub-viewport supported: %s, enabled: %s\n", diff --git a/queue-6.7/drm-amd-display-fix-a-switch-statement-in-populate_dml_output_cfg_from_stream_state.patch b/queue-6.7/drm-amd-display-fix-a-switch-statement-in-populate_dml_output_cfg_from_stream_state.patch new file mode 100644 index 00000000000..5f9693290ad --- /dev/null +++ b/queue-6.7/drm-amd-display-fix-a-switch-statement-in-populate_dml_output_cfg_from_stream_state.patch @@ -0,0 +1,34 @@ +From 05638ff6dd6f0f38734b6b3ee2c7cf15520f5c00 Mon Sep 17 00:00:00 2001 +From: Christophe JAILLET +Date: Sat, 13 Jan 2024 15:58:21 +0100 +Subject: drm/amd/display: Fix a switch statement in populate_dml_output_cfg_from_stream_state() + +From: Christophe JAILLET + +commit 05638ff6dd6f0f38734b6b3ee2c7cf15520f5c00 upstream. + +It is likely that the statement related to 'dml_edp' is misplaced. So move +it in the correct "case SIGNAL_TYPE_EDP". + +Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2") +Signed-off-by: Christophe JAILLET +Signed-off-by: Hamza Mahfooz +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c ++++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +@@ -624,8 +624,8 @@ static void populate_dml_output_cfg_from + if (is_dp2p0_output_encoder(pipe)) + out->OutputEncoder[location] = dml_dp2p0; + break; +- out->OutputEncoder[location] = dml_edp; + case SIGNAL_TYPE_EDP: ++ out->OutputEncoder[location] = dml_edp; + break; + case SIGNAL_TYPE_HDMI_TYPE_A: + case SIGNAL_TYPE_DVI_SINGLE_LINK: diff --git a/queue-6.7/drm-amd-display-fix-dml2-watermark-calculation.patch b/queue-6.7/drm-amd-display-fix-dml2-watermark-calculation.patch new file mode 100644 index 00000000000..39894885041 --- /dev/null +++ b/queue-6.7/drm-amd-display-fix-dml2-watermark-calculation.patch @@ -0,0 +1,52 @@ +From d3579f5df0536c2f0fabaa3ea80bb2d179884195 Mon Sep 17 00:00:00 2001 +From: Ovidiu Bunea +Date: Mon, 18 Dec 2023 21:40:45 -0500 +Subject: drm/amd/display: Fix DML2 watermark calculation + +From: Ovidiu Bunea + +commit d3579f5df0536c2f0fabaa3ea80bb2d179884195 upstream. + +[Why] +core_mode_programming in DML2 should output watermark calculations +to locals, but it incorrectly uses mode_lib + +[How] +update code to match HW DML2 + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Reviewed-by: Charlene Liu +Acked-by: Alex Hung +Signed-off-by: Ovidiu Bunea +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c ++++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c +@@ -9446,13 +9446,13 @@ void dml_core_mode_programming(struct di + CalculateWatermarks_params->CompressedBufferSizeInkByte = locals->CompressedBufferSizeInkByte; + + // Output +- CalculateWatermarks_params->Watermark = &s->dummy_watermark; // Watermarks *Watermark +- CalculateWatermarks_params->DRAMClockChangeSupport = &mode_lib->ms.support.DRAMClockChangeSupport[0]; +- CalculateWatermarks_params->MaxActiveDRAMClockChangeLatencySupported = &s->dummy_single_array[0][0]; // dml_float_t *MaxActiveDRAMClockChangeLatencySupported[] +- CalculateWatermarks_params->SubViewportLinesNeededInMALL = &mode_lib->ms.SubViewportLinesNeededInMALL[j]; // dml_uint_t SubViewportLinesNeededInMALL[] +- CalculateWatermarks_params->FCLKChangeSupport = &mode_lib->ms.support.FCLKChangeSupport[0]; +- CalculateWatermarks_params->MaxActiveFCLKChangeLatencySupported = &s->dummy_single[0]; // dml_float_t *MaxActiveFCLKChangeLatencySupported +- CalculateWatermarks_params->USRRetrainingSupport = &mode_lib->ms.support.USRRetrainingSupport[0]; ++ CalculateWatermarks_params->Watermark = &locals->Watermark; // Watermarks *Watermark ++ CalculateWatermarks_params->DRAMClockChangeSupport = &locals->DRAMClockChangeSupport; ++ CalculateWatermarks_params->MaxActiveDRAMClockChangeLatencySupported = locals->MaxActiveDRAMClockChangeLatencySupported; // dml_float_t *MaxActiveDRAMClockChangeLatencySupported[] ++ CalculateWatermarks_params->SubViewportLinesNeededInMALL = locals->SubViewportLinesNeededInMALL; // dml_uint_t SubViewportLinesNeededInMALL[] ++ CalculateWatermarks_params->FCLKChangeSupport = &locals->FCLKChangeSupport; ++ CalculateWatermarks_params->MaxActiveFCLKChangeLatencySupported = &locals->MaxActiveFCLKChangeLatencySupported; // dml_float_t *MaxActiveFCLKChangeLatencySupported ++ CalculateWatermarks_params->USRRetrainingSupport = &locals->USRRetrainingSupport; + + CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport( + &mode_lib->scratch, diff --git a/queue-6.7/drm-amd-display-fix-late-derefrence-dsc-check-in-link_set_dsc_pps_packet.patch b/queue-6.7/drm-amd-display-fix-late-derefrence-dsc-check-in-link_set_dsc_pps_packet.patch new file mode 100644 index 00000000000..e7245f74721 --- /dev/null +++ b/queue-6.7/drm-amd-display-fix-late-derefrence-dsc-check-in-link_set_dsc_pps_packet.patch @@ -0,0 +1,50 @@ +From 3bb9b1f958c3d986ed90a3ff009f1e77e9553207 Mon Sep 17 00:00:00 2001 +From: Srinivasan Shanmugam +Date: Wed, 10 Jan 2024 20:58:35 +0530 +Subject: drm/amd/display: Fix late derefrence 'dsc' check in 'link_set_dsc_pps_packet()' + +From: Srinivasan Shanmugam + +commit 3bb9b1f958c3d986ed90a3ff009f1e77e9553207 upstream. + +In link_set_dsc_pps_packet(), 'struct display_stream_compressor *dsc' +was dereferenced in a DC_LOGGER_INIT(dsc->ctx->logger); before the 'dsc' +NULL pointer check. + +Fixes the below: +drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c:905 link_set_dsc_pps_packet() warn: variable dereferenced before check 'dsc' (see line 903) + +Cc: stable@vger.kernel.org +Cc: Aurabindo Pillai +Cc: Rodrigo Siqueira +Cc: Hamza Mahfooz +Cc: Wenjing Liu +Cc: Qingqing Zhuo +Signed-off-by: Srinivasan Shanmugam +Reviewed-by: Aurabindo Pillai +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/link/link_dpms.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c ++++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c +@@ -875,11 +875,15 @@ bool link_set_dsc_pps_packet(struct pipe + { + struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; + struct dc_stream_state *stream = pipe_ctx->stream; +- DC_LOGGER_INIT(dsc->ctx->logger); + +- if (!pipe_ctx->stream->timing.flags.DSC || !dsc) ++ if (!pipe_ctx->stream->timing.flags.DSC) ++ return false; ++ ++ if (!dsc) + return false; + ++ DC_LOGGER_INIT(dsc->ctx->logger); ++ + if (enable) { + struct dsc_config dsc_cfg; + uint8_t dsc_packed_pps[128]; diff --git a/queue-6.7/drm-amd-display-fix-uninitialized-variable-usage-in-core_link_-read_dpcd-write_dpcd-functions.patch b/queue-6.7/drm-amd-display-fix-uninitialized-variable-usage-in-core_link_-read_dpcd-write_dpcd-functions.patch new file mode 100644 index 00000000000..5cc4c08fe4e --- /dev/null +++ b/queue-6.7/drm-amd-display-fix-uninitialized-variable-usage-in-core_link_-read_dpcd-write_dpcd-functions.patch @@ -0,0 +1,53 @@ +From a58371d632ebab9ea63f10893a6b6731196b6f8d Mon Sep 17 00:00:00 2001 +From: Srinivasan Shanmugam +Date: Wed, 17 Jan 2024 08:41:52 +0530 +Subject: drm/amd/display: Fix uninitialized variable usage in core_link_ 'read_dpcd() & write_dpcd()' functions + +From: Srinivasan Shanmugam + +commit a58371d632ebab9ea63f10893a6b6731196b6f8d upstream. + +The 'status' variable in 'core_link_read_dpcd()' & +'core_link_write_dpcd()' was uninitialized. + +Thus, initializing 'status' variable to 'DC_ERROR_UNEXPECTED' by default. + +Fixes the below: +drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.c:226 core_link_read_dpcd() error: uninitialized symbol 'status'. +drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.c:248 core_link_write_dpcd() error: uninitialized symbol 'status'. + +Cc: stable@vger.kernel.org +Cc: Jerry Zuo +Cc: Jun Lei +Cc: Wayne Lin +Cc: Aurabindo Pillai +Cc: Rodrigo Siqueira +Cc: Hamza Mahfooz +Signed-off-by: Srinivasan Shanmugam +Reviewed-by: Rodrigo Siqueira +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c ++++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c +@@ -205,7 +205,7 @@ enum dc_status core_link_read_dpcd( + uint32_t extended_size; + /* size of the remaining partitioned address space */ + uint32_t size_left_to_read; +- enum dc_status status; ++ enum dc_status status = DC_ERROR_UNEXPECTED; + /* size of the next partition to be read from */ + uint32_t partition_size; + uint32_t data_index = 0; +@@ -234,7 +234,7 @@ enum dc_status core_link_write_dpcd( + { + uint32_t partition_size; + uint32_t data_index = 0; +- enum dc_status status; ++ enum dc_status status = DC_ERROR_UNEXPECTED; + + while (size) { + partition_size = dpcd_get_next_partition_size(address, size); diff --git a/queue-6.7/drm-amd-display-fix-variable-deferencing-before-null-check-in-edp_setup_replay.patch b/queue-6.7/drm-amd-display-fix-variable-deferencing-before-null-check-in-edp_setup_replay.patch new file mode 100644 index 00000000000..5e67c4cbe89 --- /dev/null +++ b/queue-6.7/drm-amd-display-fix-variable-deferencing-before-null-check-in-edp_setup_replay.patch @@ -0,0 +1,63 @@ +From 7073934f5d73f8b53308963cee36f0d389ea857c Mon Sep 17 00:00:00 2001 +From: Srinivasan Shanmugam +Date: Mon, 8 Jan 2024 21:20:28 +0530 +Subject: drm/amd/display: Fix variable deferencing before NULL check in edp_setup_replay() + +From: Srinivasan Shanmugam + +commit 7073934f5d73f8b53308963cee36f0d389ea857c upstream. + +In edp_setup_replay(), 'struct dc *dc' & 'struct dmub_replay *replay' +was dereferenced before the pointer 'link' & 'replay' NULL check. + +Fixes the below: +drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c:947 edp_setup_replay() warn: variable dereferenced before check 'link' (see line 933) + +Cc: stable@vger.kernel.org +Cc: Bhawanpreet Lakha +Cc: Harry Wentland +Cc: Rodrigo Siqueira +Cc: Aurabindo Pillai +Cc: Alex Deucher +Signed-off-by: Srinivasan Shanmugam +Reviewed-by: Aurabindo Pillai +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c | 11 ++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c ++++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +@@ -927,8 +927,8 @@ bool edp_get_replay_state(const struct d + bool edp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream) + { + /* To-do: Setup Replay */ +- struct dc *dc = link->ctx->dc; +- struct dmub_replay *replay = dc->res_pool->replay; ++ struct dc *dc; ++ struct dmub_replay *replay; + int i; + unsigned int panel_inst; + struct replay_context replay_context = { 0 }; +@@ -944,6 +944,10 @@ bool edp_setup_replay(struct dc_link *li + if (!link) + return false; + ++ dc = link->ctx->dc; ++ ++ replay = dc->res_pool->replay; ++ + if (!replay) + return false; + +@@ -972,8 +976,7 @@ bool edp_setup_replay(struct dc_link *li + + replay_context.line_time_in_ns = lineTimeInNs; + +- if (replay) +- link->replay_settings.replay_feature_enabled = ++ link->replay_settings.replay_feature_enabled = + replay->funcs->replay_copy_settings(replay, link, &replay_context, panel_inst); + if (link->replay_settings.replay_feature_enabled) { + diff --git a/queue-6.7/drm-amd-display-port-dentist-hang-and-tdr-fixes-to-otg-disable-w-a.patch b/queue-6.7/drm-amd-display-port-dentist-hang-and-tdr-fixes-to-otg-disable-w-a.patch new file mode 100644 index 00000000000..8af0a07651b --- /dev/null +++ b/queue-6.7/drm-amd-display-port-dentist-hang-and-tdr-fixes-to-otg-disable-w-a.patch @@ -0,0 +1,83 @@ +From 4b56f7d47be87cde5f368b67bc7fac53a2c3e8d2 Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas +Date: Fri, 15 Dec 2023 11:01:42 -0500 +Subject: drm/amd/display: Port DENTIST hang and TDR fixes to OTG disable W/A + +From: Nicholas Kazlauskas + +commit 4b56f7d47be87cde5f368b67bc7fac53a2c3e8d2 upstream. + +[Why] +We can experience DENTIST hangs during optimize_bandwidth or TDRs if +FIFO is toggled and hangs. + +[How] +Port the DCN35 fixes to DCN314. + +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Reviewed-by: Charlene Liu +Acked-by: Alex Hung +Signed-off-by: Nicholas Kazlauskas +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 21 ++++------ + 1 file changed, 9 insertions(+), 12 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c +@@ -131,30 +131,27 @@ static int dcn314_get_active_display_cnt + return display_count; + } + +-static void dcn314_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable) ++static void dcn314_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, ++ bool safe_to_lower, bool disable) + { + struct dc *dc = clk_mgr_base->ctx->dc; + int i; + + for (i = 0; i < dc->res_pool->pipe_count; ++i) { +- struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; ++ struct pipe_ctx *pipe = safe_to_lower ++ ? &context->res_ctx.pipe_ctx[i] ++ : &dc->current_state->res_ctx.pipe_ctx[i]; + + if (pipe->top_pipe || pipe->prev_odm_pipe) + continue; + if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) { +- struct stream_encoder *stream_enc = pipe->stream_res.stream_enc; +- + if (disable) { +- if (stream_enc && stream_enc->funcs->disable_fifo) +- pipe->stream_res.stream_enc->funcs->disable_fifo(stream_enc); ++ if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc) ++ pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg); + +- pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg); + reset_sync_context_for_pipe(dc, context, i); + } else { + pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); +- +- if (stream_enc && stream_enc->funcs->enable_fifo) +- pipe->stream_res.stream_enc->funcs->enable_fifo(stream_enc); + } + } + } +@@ -252,11 +249,11 @@ void dcn314_update_clocks(struct clk_mgr + } + + if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { +- dcn314_disable_otg_wa(clk_mgr_base, context, true); ++ dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); + + clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz; + dcn314_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz); +- dcn314_disable_otg_wa(clk_mgr_base, context, false); ++ dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false); + + update_dispclk = true; + } diff --git a/queue-6.7/drm-amd-pm-add-error-log-for-smu-v13.0.6-reset.patch b/queue-6.7/drm-amd-pm-add-error-log-for-smu-v13.0.6-reset.patch new file mode 100644 index 00000000000..7ab76a01e83 --- /dev/null +++ b/queue-6.7/drm-amd-pm-add-error-log-for-smu-v13.0.6-reset.patch @@ -0,0 +1,46 @@ +From 91739a897c12dcec699e53f390be1b4abdeef3a0 Mon Sep 17 00:00:00 2001 +From: Lijo Lazar +Date: Thu, 11 Jan 2024 09:47:33 +0530 +Subject: drm/amd/pm: Add error log for smu v13.0.6 reset + +From: Lijo Lazar + +commit 91739a897c12dcec699e53f390be1b4abdeef3a0 upstream. + +For all mode-2 reset fail cases, add error log. + +Signed-off-by: Lijo Lazar +Reviewed-by: Asad Kamal +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c +@@ -2192,17 +2192,18 @@ static int smu_v13_0_6_mode2_reset(struc + continue; + } + +- if (ret) { +- dev_err(adev->dev, +- "failed to send mode2 message \tparam: 0x%08x error code %d\n", +- SMU_RESET_MODE_2, ret); ++ if (ret) + goto out; +- } ++ + } while (ret == -ETIME && timeout); + + out: + mutex_unlock(&smu->message_lock); + ++ if (ret) ++ dev_err(adev->dev, "failed to send mode2 reset, error code %d", ++ ret); ++ + return ret; + } + diff --git a/queue-6.7/drm-amd-pm-fetch-current-power-limit-from-fw.patch b/queue-6.7/drm-amd-pm-fetch-current-power-limit-from-fw.patch new file mode 100644 index 00000000000..0b72259b44b --- /dev/null +++ b/queue-6.7/drm-amd-pm-fetch-current-power-limit-from-fw.patch @@ -0,0 +1,31 @@ +From f1807682de0edbff6c1e46b19642a517d2e15c57 Mon Sep 17 00:00:00 2001 +From: Lijo Lazar +Date: Thu, 18 Jan 2024 14:25:35 +0530 +Subject: drm/amd/pm: Fetch current power limit from FW + +From: Lijo Lazar + +commit f1807682de0edbff6c1e46b19642a517d2e15c57 upstream. + +Power limit of SMUv13.0.6 SOCs can be updated by out-of-band ways. Fetch +the limit from firmware instead of using cached values. + +Signed-off-by: Lijo Lazar +Reviewed-by: Asad Kamal +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +@@ -2502,6 +2502,7 @@ int smu_get_power_limit(void *handle, + case SMU_PPT_LIMIT_CURRENT: + switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { + case IP_VERSION(13, 0, 2): ++ case IP_VERSION(13, 0, 6): + case IP_VERSION(11, 0, 7): + case IP_VERSION(11, 0, 11): + case IP_VERSION(11, 0, 12): diff --git a/queue-6.7/drm-amd-pm-fix-smuv13.0.6-current-clock-reporting.patch b/queue-6.7/drm-amd-pm-fix-smuv13.0.6-current-clock-reporting.patch new file mode 100644 index 00000000000..978ce6665ae --- /dev/null +++ b/queue-6.7/drm-amd-pm-fix-smuv13.0.6-current-clock-reporting.patch @@ -0,0 +1,35 @@ +From a992c90d8ed3929b70ae815ce21ca5651cc0a692 Mon Sep 17 00:00:00 2001 +From: Lijo Lazar +Date: Thu, 11 Jan 2024 15:28:53 +0530 +Subject: drm/amd/pm: Fix smuv13.0.6 current clock reporting + +From: Lijo Lazar + +commit a992c90d8ed3929b70ae815ce21ca5651cc0a692 upstream. + +When current clock is equal to max dpm level clock, the level is not +indicated correctly with *. Fix by comparing current clock against dpm +level value. + +Signed-off-by: Lijo Lazar +Reviewed-by: Asad Kamal +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c +@@ -924,7 +924,9 @@ static int smu_v13_0_6_print_clks(struct + if (i < (clocks.num_levels - 1)) + clk2 = clocks.data[i + 1].clocks_in_khz / 1000; + +- if (curr_clk >= clk1 && curr_clk < clk2) { ++ if (curr_clk == clk1) { ++ level = i; ++ } else if (curr_clk >= clk1 && curr_clk < clk2) { + level = (curr_clk - clk1) <= (clk2 - curr_clk) ? + i : + i + 1; diff --git a/queue-6.7/drm-amd-pm-update-the-power-cap-setting.patch b/queue-6.7/drm-amd-pm-update-the-power-cap-setting.patch new file mode 100644 index 00000000000..c024a2c9d4a --- /dev/null +++ b/queue-6.7/drm-amd-pm-update-the-power-cap-setting.patch @@ -0,0 +1,190 @@ +From 30269954745c6cac730352829ac9850918457440 Mon Sep 17 00:00:00 2001 +From: Kenneth Feng +Date: Fri, 19 Jan 2024 16:12:00 +0800 +Subject: drm/amd/pm: update the power cap setting + +From: Kenneth Feng + +commit 30269954745c6cac730352829ac9850918457440 upstream. + +update the power cap setting for smu_v13.0.0/smu_v13.0.7 + +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2356 +Signed-off-by: Kenneth Feng +Acked-by: Alex Deucher +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 54 ++++++++++++++++++- + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 54 ++++++++++++++++++- + 2 files changed, 104 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +@@ -2352,6 +2352,7 @@ static int smu_v13_0_0_get_power_limit(s + PPTable_t *pptable = table_context->driver_pptable; + SkuTable_t *skutable = &pptable->SkuTable; + uint32_t power_limit, od_percent_upper, od_percent_lower; ++ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC]; + + if (smu_v13_0_get_current_power_limit(smu, &power_limit)) + power_limit = smu->adev->pm.ac_power ? +@@ -2375,7 +2376,7 @@ static int smu_v13_0_0_get_power_limit(s + od_percent_upper, od_percent_lower, power_limit); + + if (max_power_limit) { +- *max_power_limit = power_limit * (100 + od_percent_upper); ++ *max_power_limit = msg_limit * (100 + od_percent_upper); + *max_power_limit /= 100; + } + +@@ -2970,6 +2971,55 @@ static ssize_t smu_v13_0_0_get_ecc_info( + return ret; + } + ++static int smu_v13_0_0_set_power_limit(struct smu_context *smu, ++ enum smu_ppt_limit_type limit_type, ++ uint32_t limit) ++{ ++ PPTable_t *pptable = smu->smu_table.driver_pptable; ++ SkuTable_t *skutable = &pptable->SkuTable; ++ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC]; ++ struct smu_table_context *table_context = &smu->smu_table; ++ OverDriveTableExternal_t *od_table = ++ (OverDriveTableExternal_t *)table_context->overdrive_table; ++ int ret = 0; ++ ++ if (limit_type != SMU_DEFAULT_PPT_LIMIT) ++ return -EINVAL; ++ ++ if (limit <= msg_limit) { ++ if (smu->current_power_limit > msg_limit) { ++ od_table->OverDriveTable.Ppt = 0; ++ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT; ++ ++ ret = smu_v13_0_0_upload_overdrive_table(smu, od_table); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n"); ++ return ret; ++ } ++ } ++ return smu_v13_0_set_power_limit(smu, limit_type, limit); ++ } else if (smu->od_enabled) { ++ ret = smu_v13_0_set_power_limit(smu, limit_type, msg_limit); ++ if (ret) ++ return ret; ++ ++ od_table->OverDriveTable.Ppt = (limit * 100) / msg_limit - 100; ++ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT; ++ ++ ret = smu_v13_0_0_upload_overdrive_table(smu, od_table); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n"); ++ return ret; ++ } ++ ++ smu->current_power_limit = limit; ++ } else { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ + static const struct pptable_funcs smu_v13_0_0_ppt_funcs = { + .get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask, + .set_default_dpm_table = smu_v13_0_0_set_default_dpm_table, +@@ -3024,7 +3074,7 @@ static const struct pptable_funcs smu_v1 + .set_fan_control_mode = smu_v13_0_set_fan_control_mode, + .enable_mgpu_fan_boost = smu_v13_0_0_enable_mgpu_fan_boost, + .get_power_limit = smu_v13_0_0_get_power_limit, +- .set_power_limit = smu_v13_0_set_power_limit, ++ .set_power_limit = smu_v13_0_0_set_power_limit, + .set_power_source = smu_v13_0_set_power_source, + .get_power_profile_mode = smu_v13_0_0_get_power_profile_mode, + .set_power_profile_mode = smu_v13_0_0_set_power_profile_mode, +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c +@@ -2316,6 +2316,7 @@ static int smu_v13_0_7_get_power_limit(s + PPTable_t *pptable = table_context->driver_pptable; + SkuTable_t *skutable = &pptable->SkuTable; + uint32_t power_limit, od_percent_upper, od_percent_lower; ++ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC]; + + if (smu_v13_0_get_current_power_limit(smu, &power_limit)) + power_limit = smu->adev->pm.ac_power ? +@@ -2339,7 +2340,7 @@ static int smu_v13_0_7_get_power_limit(s + od_percent_upper, od_percent_lower, power_limit); + + if (max_power_limit) { +- *max_power_limit = power_limit * (100 + od_percent_upper); ++ *max_power_limit = msg_limit * (100 + od_percent_upper); + *max_power_limit /= 100; + } + +@@ -2567,6 +2568,55 @@ static int smu_v13_0_7_set_df_cstate(str + NULL); + } + ++static int smu_v13_0_7_set_power_limit(struct smu_context *smu, ++ enum smu_ppt_limit_type limit_type, ++ uint32_t limit) ++{ ++ PPTable_t *pptable = smu->smu_table.driver_pptable; ++ SkuTable_t *skutable = &pptable->SkuTable; ++ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC]; ++ struct smu_table_context *table_context = &smu->smu_table; ++ OverDriveTableExternal_t *od_table = ++ (OverDriveTableExternal_t *)table_context->overdrive_table; ++ int ret = 0; ++ ++ if (limit_type != SMU_DEFAULT_PPT_LIMIT) ++ return -EINVAL; ++ ++ if (limit <= msg_limit) { ++ if (smu->current_power_limit > msg_limit) { ++ od_table->OverDriveTable.Ppt = 0; ++ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT; ++ ++ ret = smu_v13_0_7_upload_overdrive_table(smu, od_table); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n"); ++ return ret; ++ } ++ } ++ return smu_v13_0_set_power_limit(smu, limit_type, limit); ++ } else if (smu->od_enabled) { ++ ret = smu_v13_0_set_power_limit(smu, limit_type, msg_limit); ++ if (ret) ++ return ret; ++ ++ od_table->OverDriveTable.Ppt = (limit * 100) / msg_limit - 100; ++ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT; ++ ++ ret = smu_v13_0_7_upload_overdrive_table(smu, od_table); ++ if (ret) { ++ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n"); ++ return ret; ++ } ++ ++ smu->current_power_limit = limit; ++ } else { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ + static const struct pptable_funcs smu_v13_0_7_ppt_funcs = { + .get_allowed_feature_mask = smu_v13_0_7_get_allowed_feature_mask, + .set_default_dpm_table = smu_v13_0_7_set_default_dpm_table, +@@ -2618,7 +2668,7 @@ static const struct pptable_funcs smu_v1 + .set_fan_control_mode = smu_v13_0_set_fan_control_mode, + .enable_mgpu_fan_boost = smu_v13_0_7_enable_mgpu_fan_boost, + .get_power_limit = smu_v13_0_7_get_power_limit, +- .set_power_limit = smu_v13_0_set_power_limit, ++ .set_power_limit = smu_v13_0_7_set_power_limit, + .set_power_source = smu_v13_0_set_power_source, + .get_power_profile_mode = smu_v13_0_7_get_power_profile_mode, + .set_power_profile_mode = smu_v13_0_7_set_power_profile_mode, diff --git a/queue-6.7/drm-amdgpu-avoid-fetching-vram-vendor-information.patch b/queue-6.7/drm-amdgpu-avoid-fetching-vram-vendor-information.patch new file mode 100644 index 00000000000..604bc5fa008 --- /dev/null +++ b/queue-6.7/drm-amdgpu-avoid-fetching-vram-vendor-information.patch @@ -0,0 +1,33 @@ +From 90751bdeee4e3ac87ebf814bf282b0fa97edfeab Mon Sep 17 00:00:00 2001 +From: Lijo Lazar +Date: Sat, 20 Jan 2024 13:32:51 +0530 +Subject: drm/amdgpu: Avoid fetching vram vendor information + +From: Lijo Lazar + +commit 90751bdeee4e3ac87ebf814bf282b0fa97edfeab upstream. + +For GFX 9.4.3 APUs, the current method of fetching vram vendor +information is not reliable. Avoid fetching the information. + +Signed-off-by: Lijo Lazar +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -1950,7 +1950,8 @@ static void gmc_v9_4_3_init_vram_info(st + static const u32 regBIF_BIOS_SCRATCH_4 = 0x50; + u32 vram_info; + +- if (!amdgpu_sriov_vf(adev)) { ++ /* Only for dGPU, vendor informaton is reliable */ ++ if (!amdgpu_sriov_vf(adev) && !(adev->flags & AMD_IS_APU)) { + vram_info = RREG32(regBIF_BIOS_SCRATCH_4); + adev->gmc.vram_vendor = vram_info & 0xF; + } diff --git a/queue-6.7/drm-amdgpu-correct-the-cu-count-for-gfx-v11.patch b/queue-6.7/drm-amdgpu-correct-the-cu-count-for-gfx-v11.patch new file mode 100644 index 00000000000..c1b3240a266 --- /dev/null +++ b/queue-6.7/drm-amdgpu-correct-the-cu-count-for-gfx-v11.patch @@ -0,0 +1,33 @@ +From f4a94dbb6dc0bed10a5fc63718d00f1de45b12c0 Mon Sep 17 00:00:00 2001 +From: Likun Gao +Date: Fri, 5 Jan 2024 17:33:34 +0800 +Subject: drm/amdgpu: correct the cu count for gfx v11 + +From: Likun Gao + +commit f4a94dbb6dc0bed10a5fc63718d00f1de45b12c0 upstream. + +Correct the algorithm of active CU to skip disabled +sa for gfx v11. + +Signed-off-by: Likun Gao +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +@@ -6328,6 +6328,9 @@ static int gfx_v11_0_get_cu_info(struct + mutex_lock(&adev->grbm_idx_mutex); + for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { + for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { ++ bitmap = i * adev->gfx.config.max_sh_per_se + j; ++ if (!((gfx_v11_0_get_sa_active_bitmap(adev) >> bitmap) & 1)) ++ continue; + mask = 1; + counter = 0; + gfx_v11_0_select_se_sh(adev, i, j, 0xffffffff, 0); diff --git a/queue-6.7/drm-amdgpu-drop-exp-hw-support-check-for-gc-9.4.3.patch b/queue-6.7/drm-amdgpu-drop-exp-hw-support-check-for-gc-9.4.3.patch new file mode 100644 index 00000000000..826a9b56a10 --- /dev/null +++ b/queue-6.7/drm-amdgpu-drop-exp-hw-support-check-for-gc-9.4.3.patch @@ -0,0 +1,30 @@ +From c3d5e297dcae88274dc6924db337a2159279eced Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 9 Jan 2024 10:45:42 -0500 +Subject: drm/amdgpu: drop exp hw support check for GC 9.4.3 + +From: Alex Deucher + +commit c3d5e297dcae88274dc6924db337a2159279eced upstream. + +No longer needed. + +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +@@ -1963,8 +1963,6 @@ static int amdgpu_discovery_set_gc_ip_bl + amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); + break; + case IP_VERSION(9, 4, 3): +- if (!amdgpu_exp_hw_support) +- return -EINVAL; + amdgpu_device_ip_block_add(adev, &gfx_v9_4_3_ip_block); + break; + case IP_VERSION(10, 1, 10): diff --git a/queue-6.7/drm-amdgpu-enable-gfxoff-for-compute-on-gfx11.patch b/queue-6.7/drm-amdgpu-enable-gfxoff-for-compute-on-gfx11.patch new file mode 100644 index 00000000000..36ec0ae3e79 --- /dev/null +++ b/queue-6.7/drm-amdgpu-enable-gfxoff-for-compute-on-gfx11.patch @@ -0,0 +1,48 @@ +From aa0901a9008eeb2710292aff94e615adf7884d5f Mon Sep 17 00:00:00 2001 +From: Ori Messinger +Date: Wed, 22 Nov 2023 00:12:13 -0500 +Subject: drm/amdgpu: Enable GFXOFF for Compute on GFX11 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ori Messinger + +commit aa0901a9008eeb2710292aff94e615adf7884d5f upstream. + +On GFX version 11, GFXOFF was disabled due to a MES KIQ firmware +issue, which has since been fixed after version 64. +This patch only re-enables GFXOFF for GFX version 11 if the GPU's +MES KIQ firmware version is newer than version 64. + +V2: Keep GFXOFF disabled on GFX11 if MES KIQ is below version 64. +V3: Add parentheses to avoid GCC warning for parentheses: +"suggest parentheses around comparison in operand of ‘&’" +V4: Remove "V3" from commit title +V5: Change commit description and insert 'Acked-by' + +Signed-off-by: Ori Messinger +Acked-by: Alex Deucher +Reviewed-by: Harish Kasiviswanathan +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +@@ -684,10 +684,8 @@ err: + void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle) + { + enum amd_powergating_state state = idle ? AMD_PG_STATE_GATE : AMD_PG_STATE_UNGATE; +- /* Temporary workaround to fix issues observed in some +- * compute applications when GFXOFF is enabled on GFX11. +- */ +- if (IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 11) { ++ if (IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 11 && ++ ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) { + pr_debug("GFXOFF is %s\n", idle ? "enabled" : "disabled"); + amdgpu_gfx_off_ctrl(adev, idle); + } else if ((IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 9) && diff --git a/queue-6.7/drm-amdgpu-pm-fix-the-power-source-flag-error.patch b/queue-6.7/drm-amdgpu-pm-fix-the-power-source-flag-error.patch new file mode 100644 index 00000000000..bee9818e6e2 --- /dev/null +++ b/queue-6.7/drm-amdgpu-pm-fix-the-power-source-flag-error.patch @@ -0,0 +1,84 @@ +From ca1ffb174f16b699c536734fc12a4162097c49f4 Mon Sep 17 00:00:00 2001 +From: Ma Jun +Date: Wed, 17 Jan 2024 14:35:29 +0800 +Subject: drm/amdgpu/pm: Fix the power source flag error + +From: Ma Jun + +commit ca1ffb174f16b699c536734fc12a4162097c49f4 upstream. + +The power source flag should be updated when +[1] System receives an interrupt indicating that the power source +has changed. +[2] System resumes from suspend or runtime suspend + +Signed-off-by: Ma Jun +Reviewed-by: Lijo Lazar +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 13 +++---------- + drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 2 ++ + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 2 ++ + 3 files changed, 7 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +@@ -24,6 +24,7 @@ + + #include + #include ++#include + #include + + #include "amdgpu.h" +@@ -817,16 +818,8 @@ static int smu_late_init(void *handle) + * handle the switch automatically. Driver involvement + * is unnecessary. + */ +- if (!smu->dc_controlled_by_gpio) { +- ret = smu_set_power_source(smu, +- adev->pm.ac_power ? SMU_POWER_SOURCE_AC : +- SMU_POWER_SOURCE_DC); +- if (ret) { +- dev_err(adev->dev, "Failed to switch to %s mode!\n", +- adev->pm.ac_power ? "AC" : "DC"); +- return ret; +- } +- } ++ adev->pm.ac_power = power_supply_is_system_supplied() > 0; ++ smu_set_ac_dc(smu); + + if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 1)) || + (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 3))) +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c +@@ -1442,10 +1442,12 @@ static int smu_v11_0_irq_process(struct + case 0x3: + dev_dbg(adev->dev, "Switched to AC mode!\n"); + schedule_work(&smu->interrupt_work); ++ adev->pm.ac_power = true; + break; + case 0x4: + dev_dbg(adev->dev, "Switched to DC mode!\n"); + schedule_work(&smu->interrupt_work); ++ adev->pm.ac_power = false; + break; + case 0x7: + /* +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c +@@ -1379,10 +1379,12 @@ static int smu_v13_0_irq_process(struct + case 0x3: + dev_dbg(adev->dev, "Switched to AC mode!\n"); + smu_v13_0_ack_ac_dc_interrupt(smu); ++ adev->pm.ac_power = true; + break; + case 0x4: + dev_dbg(adev->dev, "Switched to DC mode!\n"); + smu_v13_0_ack_ac_dc_interrupt(smu); ++ adev->pm.ac_power = false; + break; + case 0x7: + /* diff --git a/queue-6.7/drm-amdgpu-show-vram-vendor-only-if-available.patch b/queue-6.7/drm-amdgpu-show-vram-vendor-only-if-available.patch new file mode 100644 index 00000000000..1dc93734685 --- /dev/null +++ b/queue-6.7/drm-amdgpu-show-vram-vendor-only-if-available.patch @@ -0,0 +1,52 @@ +From 89a7c0bd74918f723c94c10452265e25063cba9b Mon Sep 17 00:00:00 2001 +From: Lijo Lazar +Date: Sat, 20 Jan 2024 13:48:09 +0530 +Subject: drm/amdgpu: Show vram vendor only if available + +From: Lijo Lazar + +commit 89a7c0bd74918f723c94c10452265e25063cba9b upstream. + +Ony if vram vendor info is available, show in sysfs. + +Signed-off-by: Lijo Lazar +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c +index 08916538a615..8db880244324 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c +@@ -221,8 +221,23 @@ static struct attribute *amdgpu_vram_mgr_attributes[] = { + NULL + }; + ++static umode_t amdgpu_vram_attrs_is_visible(struct kobject *kobj, ++ struct attribute *attr, int i) ++{ ++ struct device *dev = kobj_to_dev(kobj); ++ struct drm_device *ddev = dev_get_drvdata(dev); ++ struct amdgpu_device *adev = drm_to_adev(ddev); ++ ++ if (attr == &dev_attr_mem_info_vram_vendor.attr && ++ !adev->gmc.vram_vendor) ++ return 0; ++ ++ return attr->mode; ++} ++ + const struct attribute_group amdgpu_vram_mgr_attr_group = { +- .attrs = amdgpu_vram_mgr_attributes ++ .attrs = amdgpu_vram_mgr_attributes, ++ .is_visible = amdgpu_vram_attrs_is_visible + }; + + /** +-- +2.43.0 + diff --git a/queue-6.7/drm-amdgpu-update-reggl2c_ctrl4-value-in-golden-setting.patch b/queue-6.7/drm-amdgpu-update-reggl2c_ctrl4-value-in-golden-setting.patch new file mode 100644 index 00000000000..f99cdb12986 --- /dev/null +++ b/queue-6.7/drm-amdgpu-update-reggl2c_ctrl4-value-in-golden-setting.patch @@ -0,0 +1,31 @@ +From 2b9a073b7304f4a9e130d04794c91a0c4f9a5c12 Mon Sep 17 00:00:00 2001 +From: Yifan Zhang +Date: Tue, 9 Jan 2024 09:19:22 +0800 +Subject: drm/amdgpu: update regGL2C_CTRL4 value in golden setting + +From: Yifan Zhang + +commit 2b9a073b7304f4a9e130d04794c91a0c4f9a5c12 upstream. + +This patch to update regGL2C_CTRL4 in golden setting. + +Signed-off-by: Yifan Zhang +Reviewed-by: Tim Huang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.7.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +@@ -114,7 +114,7 @@ static const struct soc15_reg_golden gol + SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3), + SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL, 0xffffffff, 0xf37fff3f), + SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL3, 0xfffffffb, 0x00f40188), +- SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL4, 0xf0ffffff, 0x8000b007), ++ SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL4, 0xf0ffffff, 0x80009007), + SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0xf1ffffff, 0x00880007), + SOC15_REG_GOLDEN_VALUE(GC, 0, regPC_CONFIG_CNTL_1, 0xffffffff, 0x00010000), + SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL_AUX, 0xf7f7ffff, 0x01030000), diff --git a/queue-6.7/drm-bridge-nxp-ptn3460-simplify-some-error-checking.patch b/queue-6.7/drm-bridge-nxp-ptn3460-simplify-some-error-checking.patch new file mode 100644 index 00000000000..508d06dcfc0 --- /dev/null +++ b/queue-6.7/drm-bridge-nxp-ptn3460-simplify-some-error-checking.patch @@ -0,0 +1,62 @@ +From 28d3d0696688154cc04983f343011d07bf0508e4 Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Wed, 6 Dec 2023 18:05:15 +0300 +Subject: drm/bridge: nxp-ptn3460: simplify some error checking + +From: Dan Carpenter + +commit 28d3d0696688154cc04983f343011d07bf0508e4 upstream. + +The i2c_master_send/recv() functions return negative error codes or +they return "len" on success. So the error handling here can be written +as just normal checks for "if (ret < 0) return ret;". No need to +complicate things. + +Btw, in this code the "len" parameter can never be zero, but even if +it were, then I feel like this would still be the best way to write it. + +Fixes: 914437992876 ("drm/bridge: nxp-ptn3460: fix i2c_master_send() error checking") +Suggested-by: Neil Armstrong +Signed-off-by: Dan Carpenter +Reviewed-by: Robert Foss +Signed-off-by: Robert Foss +Link: https://patchwork.freedesktop.org/patch/msgid/04242630-42d8-4920-8c67-24ac9db6b3c9@moroto.mountain +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/bridge/nxp-ptn3460.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/bridge/nxp-ptn3460.c ++++ b/drivers/gpu/drm/bridge/nxp-ptn3460.c +@@ -54,15 +54,15 @@ static int ptn3460_read_bytes(struct ptn + int ret; + + ret = i2c_master_send(ptn_bridge->client, &addr, 1); +- if (ret <= 0) { ++ if (ret < 0) { + DRM_ERROR("Failed to send i2c command, ret=%d\n", ret); +- return ret ?: -EIO; ++ return ret; + } + + ret = i2c_master_recv(ptn_bridge->client, buf, len); +- if (ret != len) { ++ if (ret < 0) { + DRM_ERROR("Failed to recv i2c data, ret=%d\n", ret); +- return ret < 0 ? ret : -EIO; ++ return ret; + } + + return 0; +@@ -78,9 +78,9 @@ static int ptn3460_write_byte(struct ptn + buf[1] = val; + + ret = i2c_master_send(ptn_bridge->client, buf, ARRAY_SIZE(buf)); +- if (ret != ARRAY_SIZE(buf)) { ++ if (ret < 0) { + DRM_ERROR("Failed to send i2c command, ret=%d\n", ret); +- return ret < 0 ? ret : -EIO; ++ return ret; + } + + return 0; diff --git a/queue-6.7/revert-drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch b/queue-6.7/revert-drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch new file mode 100644 index 00000000000..218e597175e --- /dev/null +++ b/queue-6.7/revert-drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch @@ -0,0 +1,46 @@ +From c2ab9ce0ee7225fc05f58a6671c43b8a3684f530 Mon Sep 17 00:00:00 2001 +From: Ivan Lipski +Date: Fri, 5 Jan 2024 19:40:50 -0500 +Subject: Revert "drm/amd/display: fix bandwidth validation failure on DCN 2.1" + +From: Ivan Lipski + +commit c2ab9ce0ee7225fc05f58a6671c43b8a3684f530 upstream. + +This commit causes dmesg-warn on several IGT tests on DCN 3.1.6: *ERROR* +link_enc_cfg_validate: Invalid link encoder assignments - 0x1c + +Affected IGT tests include: +- amdgpu/[amd_assr|amd_plane|amd_hotplug] +- kms_atomic +- kms_color +- kms_flip +- kms_properties +- kms_universal_plane + +and some other tests + +This reverts commit 3a0fa3bc245ef92838a8296e0055569b8dff94c4. + +Cc: Melissa Wen +Cc: Hamza Mahfooz +Reviewed-by: Rodrigo Siqueira +Signed-off-by: Ivan Lipski +Signed-off-by: Rodrigo Siqueira +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -10479,7 +10479,7 @@ static int amdgpu_dm_atomic_check(struct + DRM_DEBUG_DRIVER("drm_dp_mst_atomic_check() failed\n"); + goto fail; + } +- status = dc_validate_global_state(dc, dm_state->context, false); ++ status = dc_validate_global_state(dc, dm_state->context, true); + if (status != DC_OK) { + DRM_DEBUG_DRIVER("DC global validation failure: %s (%d)", + dc_status_to_str(status), status); diff --git a/queue-6.7/series b/queue-6.7/series index bdac284b4f8..5839844e30d 100644 --- a/queue-6.7/series +++ b/queue-6.7/series @@ -255,3 +255,25 @@ drm-virtio-disable-damage-clipping-if-fb-changed-since-last-page-flip.patch drm-allow-drivers-to-indicate-the-damage-helpers-to-ignore-damage-clips.patch drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch drm-amd-display-disable-psr-su-on-parade-0803-tcon-again.patch +revert-drm-amd-display-fix-bandwidth-validation-failure-on-dcn-2.1.patch +drm-bridge-nxp-ptn3460-simplify-some-error-checking.patch +drm-amd-display-fix-a-debugfs-null-pointer-error.patch +drm-amdgpu-enable-gfxoff-for-compute-on-gfx11.patch +drm-amdgpu-drop-exp-hw-support-check-for-gc-9.4.3.patch +drm-amdgpu-update-reggl2c_ctrl4-value-in-golden-setting.patch +drm-amdgpu-correct-the-cu-count-for-gfx-v11.patch +drm-amd-pm-fix-smuv13.0.6-current-clock-reporting.patch +drm-amd-pm-add-error-log-for-smu-v13.0.6-reset.patch +drm-amd-display-fix-variable-deferencing-before-null-check-in-edp_setup_replay.patch +drm-amd-display-fix-dml2-watermark-calculation.patch +drm-amd-display-port-dentist-hang-and-tdr-fixes-to-otg-disable-w-a.patch +drm-amd-display-align-the-returned-error-code-with-legacy-dp.patch +drm-amd-display-fix-late-derefrence-dsc-check-in-link_set_dsc_pps_packet.patch +drm-amd-display-fix-a-switch-statement-in-populate_dml_output_cfg_from_stream_state.patch +drm-amd-amdgpu-assign-gart-pages-to-amd-device-mapping.patch +drm-amd-pm-fetch-current-power-limit-from-fw.patch +drm-amdgpu-avoid-fetching-vram-vendor-information.patch +drm-amdgpu-show-vram-vendor-only-if-available.patch +drm-amd-pm-update-the-power-cap-setting.patch +drm-amdgpu-pm-fix-the-power-source-flag-error.patch +drm-amd-display-fix-uninitialized-variable-usage-in-core_link_-read_dpcd-write_dpcd-functions.patch -- 2.47.3