From 84316f25479255b64e635d8065f18807d09b4c0b Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Thu, 17 Feb 2011 23:10:37 +0100 Subject: [PATCH] re PR target/43653 (ICE at reload1.c:1188 with -O1 -ftree-vectorize and empty struct) PR target/43653 * config/i386/i386.c (ix86_secondary_reload): Handle SSE input reload with PLUS RTX. testsuite/ChangeLog: PR target/43653 * gcc.target/i386/pr43653.c: New test. From-SVN: r170258 --- gcc/ChangeLog | 18 +++++++---- gcc/config/i386/i386.c | 42 ++++++++++++++++++++++++- gcc/testsuite/ChangeLog | 5 +++ gcc/testsuite/gcc.target/i386/pr43653.c | 14 +++++++++ 4 files changed, 72 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr43653.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 995df6f05b56..fb2b2104ca3e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-02-17 Uros Bizjak + + PR target/43653 + * config/i386/i386.c (ix86_secondary_reload): Handle SSE + input reload with PLUS RTX. + 2011-02-15 Rainer Orth PR pch/14940 @@ -16,7 +22,7 @@ 2010-08-22 John David Anglin - PR boehm-gc/34544 + PR boehm-gc/34544 * gthr-posix.h (__gthread_active_init): Delete. (__gthread_active_p): Do activity check here. Don't include errno.h on hppa-hpux. Update comment. @@ -29,9 +35,9 @@ Backport from mainline: 2010-12-30 Nathan Froyd - PR target/44606 - * reload1.c (choose_reload_regs): Don't look for equivalences for - output reloads of constant loads. + PR target/44606 + * reload1.c (choose_reload_regs): Don't look for equivalences for + output reloads of constant loads. 2011-01-17 H.J. Lu @@ -152,7 +158,7 @@ Backport from mainline: 2010-09-15 Olivier Hainque - Jose Ruiz + Jose Ruiz * config/alpha/osf.h (MD_UNWIND_SUPPORT): Define. * config/alpha/osf-unwind.h: New file. @@ -260,7 +266,7 @@ PR middle-end/44569 * lower-suberg.c (simplify_subreg_concatn): For VOIDmode elements, - determine the mode of a subreg by GET_MODE_INNER of CONCATN RTX. + determine the mode of a subreg by GET_MODE_INNER of a CONCATN RTX. 2010-10-22 Uros Bizjak diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 4e6f6895dcc4..f0ab2968e23e 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -25627,7 +25627,8 @@ ix86_secondary_reload (bool in_p, rtx x, enum reg_class rclass, { /* QImode spills from non-QI registers require intermediate register on 32bit targets. */ - if (!in_p && mode == QImode && !TARGET_64BIT + if (!TARGET_64BIT + && !in_p && mode == QImode && (rclass == GENERAL_REGS || rclass == LEGACY_REGS || rclass == INDEX_REGS)) @@ -25647,6 +25648,45 @@ ix86_secondary_reload (bool in_p, rtx x, enum reg_class rclass, return Q_REGS; } + /* This condition handles corner case where an expression involving + pointers gets vectorized. We're trying to use the address of a + stack slot as a vector initializer. + + (set (reg:V2DI 74 [ vect_cst_.2 ]) + (vec_duplicate:V2DI (reg/f:DI 20 frame))) + + Eventually frame gets turned into sp+offset like this: + + (set (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) + (vec_duplicate:V2DI (plus:DI (reg/f:DI 7 sp) + (const_int 392 [0x188])))) + + That later gets turned into: + + (set (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) + (vec_duplicate:V2DI (plus:DI (reg/f:DI 7 sp) + (mem/u/c/i:DI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A64])))) + + We'll have the following reload recorded: + + Reload 0: reload_in (DI) = + (plus:DI (reg/f:DI 7 sp) + (mem/u/c/i:DI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A64])) + reload_out (V2DI) = (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) + SSE_REGS, RELOAD_OTHER (opnum = 0), can't combine + reload_in_reg: (plus:DI (reg/f:DI 7 sp) (const_int 392 [0x188])) + reload_out_reg: (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74]) + reload_reg_rtx: (reg:V2DI 22 xmm1) + + Which isn't going to work since SSE instructions can't handle scalar + additions. Returning GENERAL_REGS forces the addition into integer + register and reload can handle subsequent reloads without problems. */ + + if (in_p && GET_CODE (x) == PLUS + && SSE_CLASS_P (rclass) + && SCALAR_INT_MODE_P (mode)) + return GENERAL_REGS; + return NO_REGS; } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3c53c6311a8d..2863f91962ed 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-02-17 Uros Bizjak + + PR target/43653 + * gcc.target/i386/pr43653.c: New test. + 2011-02-14 Tobias Burnus * gfortran.dg/argument_checking_13.f90: Update dg-error. diff --git a/gcc/testsuite/gcc.target/i386/pr43653.c b/gcc/testsuite/gcc.target/i386/pr43653.c new file mode 100644 index 000000000000..22928edacfec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr43653.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O1 -ftree-vectorize -msse" } */ + +typedef struct {} S; + +void *foo() +{ + S a[64], *p[64]; + int i; + + for (i = 0; i < 64; i++) + p[i] = &a[i]; + return p[0]; +} -- 2.47.2