From 84c4a16e00f5aadbb1a3bdecc6bbfee35b7c45c8 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sun, 29 Jun 2025 00:16:06 +0800 Subject: [PATCH] arm64: dts: allwinner: a523: Move rgmii0 pins to correct location Nodes are supposed to be sorted by address, or if no addresses apply, by node name. The rgmii0 pins are out of order, possibly due to multiple patches adding pin mux settings conflicting. Move the rgmii0 pins to the correct location. Reviewed-by: Andre Przywara Link: https://patch.msgid.link/20250628161608.3072968-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index 458d7ecedacd4..30613a0b1124e 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -126,16 +126,6 @@ interrupt-controller; #interrupt-cells = <3>; - rgmii0_pins: rgmii0-pins { - pins = "PH0", "PH1", "PH2", "PH3", "PH4", - "PH5", "PH6", "PH7", "PH9", "PH10", - "PH14", "PH15", "PH16", "PH17", "PH18"; - allwinner,pinmux = <5>; - function = "emac0"; - drive-strength = <40>; - bias-disable; - }; - mmc0_pins: mmc0-pins { pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,pinmux = <2>; @@ -163,6 +153,16 @@ bias-pull-up; }; + rgmii0_pins: rgmii0-pins { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", + "PH5", "PH6", "PH7", "PH9", "PH10", + "PH14", "PH15", "PH16", "PH17", "PH18"; + allwinner,pinmux = <5>; + function = "emac0"; + drive-strength = <40>; + bias-disable; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB9", "PB10"; allwinner,pinmux = <2>; -- 2.47.2