From 8d26856fabf8faac60de03a2e0fc35e5338e248e Mon Sep 17 00:00:00 2001 From: Bibo Mao Date: Thu, 4 Sep 2025 19:16:57 +0800 Subject: [PATCH] target/loongarch: Only flush one TLB entry in helper_invtlb_page_asid() With function helper_invtlb_page_asid(), only one TLB entry in LoongArch emulated TLB is invalidated. so with QEMU TLB, it is not necessary to flush all QEMU TLB, only flush address range specified LoongArch emulated TLB is ok. Here invalidate_tlb_entry() is called so that only QEMU TLB entry with specified address range is flushed. Signed-off-by: Bibo Mao Reviewed-by: Richard Henderson --- target/loongarch/tcg/tlb_helper.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c index 243f9456129..8cfce48a297 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -541,8 +541,7 @@ void helper_invtlb_page_asid(CPULoongArchState *env, target_ulong info, func = tlb_match_asid; tlb = loongarch_tlb_search_cb(env, addr, asid, func); if (tlb) { - tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, E, 0); - tlb_flush(env_cpu(env)); + invalidate_tlb(env, tlb - env->tlb); } } -- 2.47.3