From 94b110106b48bd84be6c7fca3bc36a77f974a9a1 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 10 May 2024 18:23:21 +0300 Subject: [PATCH] drm/i915/gvt: Use PLANE_CTL and PLANE_SURF defines MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Stop hand rolling PLANE_CTL and PLANE_SURF for the third plane and just use the real thing. Cc: Zhenyu Wang CC: Zhi Wang Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index b53c98cd6d7f9..843bdb46d49cc 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -1030,12 +1030,12 @@ static int iterate_skl_plus_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 1)); MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 2)); MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 3)); - MMIO_D(_MMIO(_PLANE_CTL_3_A)); - MMIO_D(_MMIO(_PLANE_CTL_3_B)); - MMIO_D(_MMIO(0x72380)); - MMIO_D(_MMIO(0x7239c)); - MMIO_D(_MMIO(_PLANE_SURF_3_A)); - MMIO_D(_MMIO(_PLANE_SURF_3_B)); + MMIO_D(PLANE_CTL(PIPE_A, 2)); + MMIO_D(PLANE_CTL(PIPE_B, 2)); + MMIO_D(PLANE_CTL(PIPE_C, 2)); + MMIO_D(PLANE_SURF(PIPE_A, 2)); + MMIO_D(PLANE_SURF(PIPE_B, 2)); + MMIO_D(PLANE_SURF(PIPE_C, 2)); MMIO_D(DMC_SSP_BASE); MMIO_D(DMC_HTP_SKL); MMIO_D(DMC_LAST_WRITE); -- 2.47.2