From 977afdeb06ccf50d78c2f1a4293104efe8b02e4d Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Thu, 30 Mar 2023 06:15:35 -0400 Subject: [PATCH] Drop riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch from older kernels --- ...ei-issues-between-clang-and-binutils.patch | 122 ------------------ queue-5.10/series | 1 - ...ei-issues-between-clang-and-binutils.patch | 122 ------------------ queue-5.4/series | 1 - 4 files changed, 246 deletions(-) delete mode 100644 queue-5.10/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch delete mode 100644 queue-5.4/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch diff --git a/queue-5.10/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch b/queue-5.10/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch deleted file mode 100644 index 0a022e3885a..00000000000 --- a/queue-5.10/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch +++ /dev/null @@ -1,122 +0,0 @@ -From e89c2e815e76471cb507bd95728bf26da7976430 Mon Sep 17 00:00:00 2001 -From: Nathan Chancellor -Date: Mon, 13 Mar 2023 16:00:23 -0700 -Subject: riscv: Handle zicsr/zifencei issues between clang and binutils - -From: Nathan Chancellor - -commit e89c2e815e76471cb507bd95728bf26da7976430 upstream. - -There are two related issues that appear in certain combinations with -clang and GNU binutils. - -The first occurs when a version of clang that supports zicsr or zifencei -via '-march=' [1] (i.e, >= 17.x) is used in combination with a version -of GNU binutils that do not recognize zicsr and zifencei in the -'-march=' value (i.e., < 2.36): - - riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zicsr2p0_zifencei2p0: Invalid or unknown z ISA extension: 'zifencei' - riscv64-linux-gnu-ld: failed to merge target specific data of file fs/efivarfs/file.o - riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zicsr2p0_zifencei2p0: Invalid or unknown z ISA extension: 'zifencei' - riscv64-linux-gnu-ld: failed to merge target specific data of file fs/efivarfs/super.o - -The second occurs when a version of clang that does not support zicsr or -zifencei via '-march=' (i.e., <= 16.x) is used in combination with a -version of GNU as that defaults to a newer ISA base spec, which requires -specifying zicsr and zifencei in the '-march=' value explicitly (i.e, >= -2.38): - - ../arch/riscv/kernel/kexec_relocate.S: Assembler messages: - ../arch/riscv/kernel/kexec_relocate.S:147: Error: unrecognized opcode `fence.i', extension `zifencei' required - clang-12: error: assembler command failed with exit code 1 (use -v to see invocation) - -This is the same issue addressed by commit 6df2a016c0c8 ("riscv: fix -build with binutils 2.38") (see [2] for additional information) but -older versions of clang miss out on it because the cc-option check -fails: - - clang-12: error: invalid arch name 'rv64imac_zicsr_zifencei', unsupported standard user-level extension 'zicsr' - clang-12: error: invalid arch name 'rv64imac_zicsr_zifencei', unsupported standard user-level extension 'zicsr' - -To resolve the first issue, only attempt to add zicsr and zifencei to -the march string when using the GNU assembler 2.38 or newer, which is -when the default ISA spec was updated, requiring these extensions to be -specified explicitly. LLVM implements an older version of the base -specification for all currently released versions, so these instructions -are available as part of the 'i' extension. If LLVM's implementation is -updated in the future, a CONFIG_AS_IS_LLVM condition can be added to -CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. - -To resolve the second issue, use version 2.2 of the base ISA spec when -using an older version of clang that does not support zicsr or zifencei -via '-march=', as that is the spec version most compatible with the one -clang/LLVM implements and avoids the need to specify zicsr and zifencei -explicitly due to still being a part of 'i'. - -[1]: https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 -[2]: https://lore.kernel.org/ZAxT7T9Xy1Fo3d5W@aurel32.net/ - -Cc: stable@vger.kernel.org -Link: https://github.com/ClangBuiltLinux/linux/issues/1808 -Co-developed-by: Conor Dooley -Signed-off-by: Conor Dooley -Signed-off-by: Nathan Chancellor -Acked-by: Conor Dooley -Link: https://lore.kernel.org/r/20230313-riscv-zicsr-zifencei-fiasco-v1-1-dd1b7840a551@kernel.org -Signed-off-by: Palmer Dabbelt -Signed-off-by: Greg Kroah-Hartman ---- - arch/riscv/Kconfig | 22 ++++++++++++++++++++++ - arch/riscv/Makefile | 10 ++++++---- - 2 files changed, 28 insertions(+), 4 deletions(-) - ---- a/arch/riscv/Kconfig -+++ b/arch/riscv/Kconfig -@@ -331,6 +331,28 @@ config RISCV_BASE_PMU - - endmenu - -+config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI -+ def_bool y -+ # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc -+ depends on AS_IS_GNU && AS_VERSION >= 23800 -+ help -+ Newer binutils versions default to ISA spec version 20191213 which -+ moves some instructions from the I extension to the Zicsr and Zifencei -+ extensions. -+ -+config TOOLCHAIN_NEEDS_OLD_ISA_SPEC -+ def_bool y -+ depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI -+ # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 -+ depends on CC_IS_CLANG && CLANG_VERSION < 170000 -+ help -+ Certain versions of clang do not support zicsr and zifencei via -march -+ but newer versions of binutils require it for the reasons noted in the -+ help text of CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. This -+ option causes an older ISA spec compatible with these older versions -+ of clang to be passed to GAS, which has the same result as passing zicsr -+ and zifencei to -march. -+ - config FPU - bool "FPU support" - default y ---- a/arch/riscv/Makefile -+++ b/arch/riscv/Makefile -@@ -53,10 +53,12 @@ riscv-march-$(CONFIG_ARCH_RV64I) := rv64 - riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd - riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c - --# Newer binutils versions default to ISA spec version 20191213 which moves some --# instructions from the I extension to the Zicsr and Zifencei extensions. --toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei) --riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei -+ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC -+KBUILD_CFLAGS += -Wa,-misa-spec=2.2 -+KBUILD_AFLAGS += -Wa,-misa-spec=2.2 -+else -+riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei -+endif - - KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y)) - KBUILD_AFLAGS += -march=$(riscv-march-y) diff --git a/queue-5.10/series b/queue-5.10/series index a3b423e74ed..2f1efcf482b 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -89,7 +89,6 @@ wifi-mac80211-fix-qos-on-mesh-interfaces.patch nilfs2-fix-kernel-infoleak-in-nilfs_ioctl_wrap_copy.patch drm-i915-active-fix-missing-debug-object-activation.patch drm-i915-preserve-crtc_state-inherited-during-state-clearing.patch -riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch tee-amdtee-fix-race-condition-in-amdtee_open_session.patch firmware-arm_scmi-fix-device-node-validation-for-mailbox-transport.patch i2c-xgene-slimpro-fix-out-of-bounds-bug-in-xgene_slimpro_i2c_xfer.patch diff --git a/queue-5.4/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch b/queue-5.4/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch deleted file mode 100644 index bcec606d5de..00000000000 --- a/queue-5.4/riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch +++ /dev/null @@ -1,122 +0,0 @@ -From e89c2e815e76471cb507bd95728bf26da7976430 Mon Sep 17 00:00:00 2001 -From: Nathan Chancellor -Date: Mon, 13 Mar 2023 16:00:23 -0700 -Subject: riscv: Handle zicsr/zifencei issues between clang and binutils - -From: Nathan Chancellor - -commit e89c2e815e76471cb507bd95728bf26da7976430 upstream. - -There are two related issues that appear in certain combinations with -clang and GNU binutils. - -The first occurs when a version of clang that supports zicsr or zifencei -via '-march=' [1] (i.e, >= 17.x) is used in combination with a version -of GNU binutils that do not recognize zicsr and zifencei in the -'-march=' value (i.e., < 2.36): - - riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zicsr2p0_zifencei2p0: Invalid or unknown z ISA extension: 'zifencei' - riscv64-linux-gnu-ld: failed to merge target specific data of file fs/efivarfs/file.o - riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zicsr2p0_zifencei2p0: Invalid or unknown z ISA extension: 'zifencei' - riscv64-linux-gnu-ld: failed to merge target specific data of file fs/efivarfs/super.o - -The second occurs when a version of clang that does not support zicsr or -zifencei via '-march=' (i.e., <= 16.x) is used in combination with a -version of GNU as that defaults to a newer ISA base spec, which requires -specifying zicsr and zifencei in the '-march=' value explicitly (i.e, >= -2.38): - - ../arch/riscv/kernel/kexec_relocate.S: Assembler messages: - ../arch/riscv/kernel/kexec_relocate.S:147: Error: unrecognized opcode `fence.i', extension `zifencei' required - clang-12: error: assembler command failed with exit code 1 (use -v to see invocation) - -This is the same issue addressed by commit 6df2a016c0c8 ("riscv: fix -build with binutils 2.38") (see [2] for additional information) but -older versions of clang miss out on it because the cc-option check -fails: - - clang-12: error: invalid arch name 'rv64imac_zicsr_zifencei', unsupported standard user-level extension 'zicsr' - clang-12: error: invalid arch name 'rv64imac_zicsr_zifencei', unsupported standard user-level extension 'zicsr' - -To resolve the first issue, only attempt to add zicsr and zifencei to -the march string when using the GNU assembler 2.38 or newer, which is -when the default ISA spec was updated, requiring these extensions to be -specified explicitly. LLVM implements an older version of the base -specification for all currently released versions, so these instructions -are available as part of the 'i' extension. If LLVM's implementation is -updated in the future, a CONFIG_AS_IS_LLVM condition can be added to -CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. - -To resolve the second issue, use version 2.2 of the base ISA spec when -using an older version of clang that does not support zicsr or zifencei -via '-march=', as that is the spec version most compatible with the one -clang/LLVM implements and avoids the need to specify zicsr and zifencei -explicitly due to still being a part of 'i'. - -[1]: https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 -[2]: https://lore.kernel.org/ZAxT7T9Xy1Fo3d5W@aurel32.net/ - -Cc: stable@vger.kernel.org -Link: https://github.com/ClangBuiltLinux/linux/issues/1808 -Co-developed-by: Conor Dooley -Signed-off-by: Conor Dooley -Signed-off-by: Nathan Chancellor -Acked-by: Conor Dooley -Link: https://lore.kernel.org/r/20230313-riscv-zicsr-zifencei-fiasco-v1-1-dd1b7840a551@kernel.org -Signed-off-by: Palmer Dabbelt -Signed-off-by: Greg Kroah-Hartman ---- - arch/riscv/Kconfig | 22 ++++++++++++++++++++++ - arch/riscv/Makefile | 10 ++++++---- - 2 files changed, 28 insertions(+), 4 deletions(-) - ---- a/arch/riscv/Kconfig -+++ b/arch/riscv/Kconfig -@@ -259,6 +259,28 @@ config RISCV_BASE_PMU - - endmenu - -+config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI -+ def_bool y -+ # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc -+ depends on AS_IS_GNU && AS_VERSION >= 23800 -+ help -+ Newer binutils versions default to ISA spec version 20191213 which -+ moves some instructions from the I extension to the Zicsr and Zifencei -+ extensions. -+ -+config TOOLCHAIN_NEEDS_OLD_ISA_SPEC -+ def_bool y -+ depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI -+ # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 -+ depends on CC_IS_CLANG && CLANG_VERSION < 170000 -+ help -+ Certain versions of clang do not support zicsr and zifencei via -march -+ but newer versions of binutils require it for the reasons noted in the -+ help text of CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. This -+ option causes an older ISA spec compatible with these older versions -+ of clang to be passed to GAS, which has the same result as passing zicsr -+ and zifencei to -march. -+ - config FPU - bool "FPU support" - default y ---- a/arch/riscv/Makefile -+++ b/arch/riscv/Makefile -@@ -51,10 +51,12 @@ riscv-march-$(CONFIG_ARCH_RV64I) := rv64 - riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd - riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c - --# Newer binutils versions default to ISA spec version 20191213 which moves some --# instructions from the I extension to the Zicsr and Zifencei extensions. --toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei) --riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei -+ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC -+KBUILD_CFLAGS += -Wa,-misa-spec=2.2 -+KBUILD_AFLAGS += -Wa,-misa-spec=2.2 -+else -+riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei -+endif - - KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y)) - KBUILD_AFLAGS += -march=$(riscv-march-y) diff --git a/queue-5.4/series b/queue-5.4/series index f8b83bd1b77..03b0e45f629 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -50,7 +50,6 @@ usb-chipdea-core-fix-return-einval-if-request-role-is-the-same-with-current-role usb-chipidea-core-fix-possible-concurrent-when-switch-role.patch wifi-mac80211-fix-qos-on-mesh-interfaces.patch nilfs2-fix-kernel-infoleak-in-nilfs_ioctl_wrap_copy.patch -riscv-handle-zicsr-zifencei-issues-between-clang-and-binutils.patch i2c-xgene-slimpro-fix-out-of-bounds-bug-in-xgene_slimpro_i2c_xfer.patch dm-stats-check-for-and-propagate-alloc_percpu-failure.patch dm-crypt-add-cond_resched-to-dmcrypt_write.patch -- 2.47.3