From 9a0bd2d1aabebb0845a8761929677561ea9fa44d Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Tue, 17 Feb 2026 19:06:54 +0100 Subject: [PATCH] realtek: dsa: move n_pie_blocks into config structure Place it where it belongs. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/22068 Signed-off-by: Hauke Mehrtens --- .../drivers/net/dsa/rtl83xx/common.c | 4 ---- .../drivers/net/dsa/rtl83xx/rtl838x.c | 11 +++++----- .../drivers/net/dsa/rtl83xx/rtl838x.h | 2 +- .../drivers/net/dsa/rtl83xx/rtl839x.c | 11 +++++----- .../drivers/net/dsa/rtl83xx/rtl930x.c | 17 ++++++++------- .../drivers/net/dsa/rtl83xx/rtl931x.c | 21 ++++++++++--------- 6 files changed, 33 insertions(+), 33 deletions(-) diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c index dd1efcb2b68..0a23329778b 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c @@ -1417,7 +1417,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->ds->num_lag_ids = 8; priv->l2_bucket_size = 4; priv->n_mst = 64; - priv->n_pie_blocks = 12; break; case RTL8390_FAMILY_ID: priv->ds->ops = &rtldsa_83xx_switch_ops; @@ -1430,7 +1429,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) priv->ds->num_lag_ids = 16; priv->l2_bucket_size = 4; priv->n_mst = 256; - priv->n_pie_blocks = 18; break; case RTL9300_FAMILY_ID: priv->ds->ops = &rtldsa_93xx_switch_ops; @@ -1444,7 +1442,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) sw_w32(0, RTL930X_ST_CTRL); priv->l2_bucket_size = 8; priv->n_mst = 64; - priv->n_pie_blocks = 16; break; case RTL9310_FAMILY_ID: priv->ds->ops = &rtldsa_93xx_switch_ops; @@ -1458,7 +1455,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev) sw_w32(0, RTL931x_ST_CTRL); priv->l2_bucket_size = 8; priv->n_mst = 128; - priv->n_pie_blocks = 16; break; } diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c index 5bc564659c4..6305790fbba 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c @@ -1430,7 +1430,7 @@ static int rtl838x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul mutex_lock(&priv->pie_mutex); - for (block = 0; block < priv->n_pie_blocks; block++) { + for (block = 0; block < priv->r->n_pie_blocks; block++) { for (j = 0; j < 3; j++) { int t = (sw_r32(RTL838X_ACL_BLK_TMPLTE_CTRL(block)) >> (j * 3)) & 0x7; @@ -1443,7 +1443,7 @@ static int rtl838x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul break; } - if (block >= priv->n_pie_blocks) { + if (block >= priv->r->n_pie_blocks) { mutex_unlock(&priv->pie_mutex); return -EOPNOTSUPP; } @@ -1487,14 +1487,14 @@ static void rtl838x_pie_init(struct rtl838x_switch_priv *priv) sw_w32(1, RTL838X_ACL_PORT_LOOKUP_CTRL(i)); /* Power on all PIE blocks */ - for (int i = 0; i < priv->n_pie_blocks; i++) + for (int i = 0; i < priv->r->n_pie_blocks; i++) sw_w32_mask(0, BIT(i), RTL838X_ACL_BLK_PWR_CTRL); /* Include IPG in metering */ sw_w32(1, RTL838X_METER_GLB_CTRL); /* Delete all present rules */ - rtl838x_pie_rule_del(priv, 0, priv->n_pie_blocks * PIE_BLOCK_SIZE - 1); + rtl838x_pie_rule_del(priv, 0, priv->r->n_pie_blocks * PIE_BLOCK_SIZE - 1); /* Routing bypasses source port filter */ sw_w32_mask(0, 1, RTL838X_DMY_REG27); @@ -1506,7 +1506,7 @@ static void rtl838x_pie_init(struct rtl838x_switch_priv *priv) /* Enable predefined templates 0, 3 and 4 (IPv6 support) for odd blocks */ template_selectors = 0 | (3 << 3) | (4 << 6); - for (int i = 1; i < priv->n_pie_blocks; i += 2) + for (int i = 1; i < priv->r->n_pie_blocks; i += 2) sw_w32(template_selectors, RTL838X_ACL_BLK_TMPLTE_CTRL(i)); /* Group each pair of physical blocks together to a logical block */ @@ -1701,6 +1701,7 @@ const struct rtldsa_config rtldsa_838x_cfg = { .imr_port_link_sts_chg = RTL838X_IMR_PORT_LINK_STS_CHG, .imr_glb = RTL838X_IMR_GLB, .n_counters = 128, + .n_pie_blocks = 12, .port_ignore = 0x1f, .vlan_tables_read = rtl838x_vlan_tables_read, .vlan_set_tagged = rtl838x_vlan_set_tagged, diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h index 12abe423f23..77dc9e9a8a7 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h @@ -1274,6 +1274,7 @@ struct rtldsa_config { int imr_port_link_sts_chg; int imr_glb; int n_counters; + int n_pie_blocks; u8 port_ignore; void (*vlan_tables_read)(u32 vlan, struct rtl838x_vlan_info *info); void (*vlan_set_tagged)(u32 vlan, struct rtl838x_vlan_info *info); @@ -1389,7 +1390,6 @@ struct rtl838x_switch_priv { struct notifier_block fib_nb; bool eee_enabled; unsigned long mc_group_bm[MAX_MC_GROUPS >> 5]; - int n_pie_blocks; struct rhashtable tc_ht; unsigned long pie_use_bm[MAX_PIE_ENTRIES >> 5]; unsigned long octet_cntr_use_bm[MAX_COUNTERS >> 5]; diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c index 46bc3212d09..5fa5a136c0a 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c @@ -1333,11 +1333,11 @@ static int rtl839x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul { int idx, block, j, t; int min_block = 0; - int max_block = priv->n_pie_blocks / 2; + int max_block = priv->r->n_pie_blocks / 2; if (pr->is_egress) { min_block = max_block; - max_block = priv->n_pie_blocks; + max_block = priv->r->n_pie_blocks; } mutex_lock(&priv->pie_mutex); @@ -1353,7 +1353,7 @@ static int rtl839x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul break; } - if (block >= priv->n_pie_blocks) { + if (block >= priv->r->n_pie_blocks) { mutex_unlock(&priv->pie_mutex); return -EOPNOTSUPP; } @@ -1388,7 +1388,7 @@ static void rtl839x_pie_init(struct rtl838x_switch_priv *priv) mutex_init(&priv->pie_mutex); /* Power on all PIE blocks */ - for (int i = 0; i < priv->n_pie_blocks; i++) + for (int i = 0; i < priv->r->n_pie_blocks; i++) sw_w32_mask(0, BIT(i), RTL839X_PS_ACL_PWR_CTRL); /* Set ingress and egress ACL blocks to 50/50: first Egress block is 9 */ @@ -1398,7 +1398,7 @@ static void rtl839x_pie_init(struct rtl838x_switch_priv *priv) sw_w32(1, RTL839X_METER_GLB_CTRL); /* Delete all present rules */ - rtl839x_pie_rule_del(priv, 0, priv->n_pie_blocks * PIE_BLOCK_SIZE - 1); + rtl839x_pie_rule_del(priv, 0, priv->r->n_pie_blocks * PIE_BLOCK_SIZE - 1); /* Enable predefined templates 0, 1 for blocks 0-2 */ template_selectors = 0 | (1 << 3); @@ -1641,6 +1641,7 @@ const struct rtldsa_config rtldsa_839x_cfg = { .imr_port_link_sts_chg = RTL839X_IMR_PORT_LINK_STS_CHG, .imr_glb = RTL839X_IMR_GLB, .n_counters = 1024, + .n_pie_blocks = 18, .port_ignore = 0x3f, .vlan_tables_read = rtl839x_vlan_tables_read, .vlan_set_tagged = rtl839x_vlan_set_tagged, diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c index d07b93b7b27..5176e5f2b7d 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c @@ -1951,11 +1951,11 @@ static int rtl930x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul { int idx, block, j, t; int min_block = 0; - int max_block = priv->n_pie_blocks / 2; + int max_block = priv->r->n_pie_blocks / 2; if (pr->is_egress) { min_block = max_block; - max_block = priv->n_pie_blocks; + max_block = priv->r->n_pie_blocks; } pr_debug("In %s\n", __func__); @@ -1975,7 +1975,7 @@ static int rtl930x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul break; } - if (block >= priv->n_pie_blocks) { + if (block >= priv->r->n_pie_blocks) { mutex_unlock(&priv->pie_mutex); return -EOPNOTSUPP; } @@ -2037,29 +2037,29 @@ static void rtl930x_pie_init(struct rtl838x_switch_priv *priv) sw_w32_mask(0, 1, RTL930X_METER_GLB_CTRL); /* Delete all present rules, block size is 128 on all SoC families */ - rtl930x_pie_rule_del(priv, 0, priv->n_pie_blocks * 128 - 1); + rtl930x_pie_rule_del(priv, 0, priv->r->n_pie_blocks * 128 - 1); /* Assign blocks 0-7 to VACL phase (bit = 0), blocks 8-15 to IACL (bit = 1) */ sw_w32(0xff00, RTL930X_PIE_BLK_PHASE_CTRL); /* Enable predefined templates 0, 1 for first quarter of all blocks */ template_selectors = 0 | (1 << 4); - for (int i = 0; i < priv->n_pie_blocks / 4; i++) + for (int i = 0; i < priv->r->n_pie_blocks / 4; i++) sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i)); /* Enable predefined templates 2, 3 for second quarter of all blocks */ template_selectors = 2 | (3 << 4); - for (int i = priv->n_pie_blocks / 4; i < priv->n_pie_blocks / 2; i++) + for (int i = priv->r->n_pie_blocks / 4; i < priv->r->n_pie_blocks / 2; i++) sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i)); /* Enable predefined templates 0, 1 for third half of all blocks */ template_selectors = 0 | (1 << 4); - for (int i = priv->n_pie_blocks / 2; i < priv->n_pie_blocks * 3 / 4; i++) + for (int i = priv->r->n_pie_blocks / 2; i < priv->r->n_pie_blocks * 3 / 4; i++) sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i)); /* Enable predefined templates 2, 3 for fourth quater of all blocks */ template_selectors = 2 | (3 << 4); - for (int i = priv->n_pie_blocks * 3 / 4; i < priv->n_pie_blocks; i++) + for (int i = priv->r->n_pie_blocks * 3 / 4; i < priv->r->n_pie_blocks; i++) sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i)); } @@ -2646,6 +2646,7 @@ const struct rtldsa_config rtldsa_930x_cfg = { .imr_port_link_sts_chg = RTL930X_IMR_PORT_LINK_STS_CHG, .imr_glb = RTL930X_IMR_GLB, .n_counters = 2048, + .n_pie_blocks = 16, .port_ignore = 0x3f, .vlan_tables_read = rtl930x_vlan_tables_read, .vlan_set_tagged = rtl930x_vlan_set_tagged, diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c index 6637926fcb3..6c25fca6a97 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c @@ -1326,11 +1326,11 @@ static int rtl931x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul { int idx, block, j; int min_block = 0; - int max_block = priv->n_pie_blocks / 2; + int max_block = priv->r->n_pie_blocks / 2; if (pr->is_egress) { min_block = max_block; - max_block = priv->n_pie_blocks; + max_block = priv->r->n_pie_blocks; } pr_debug("In %s\n", __func__); @@ -1351,7 +1351,7 @@ static int rtl931x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul break; } - if (block >= priv->n_pie_blocks) { + if (block >= priv->r->n_pie_blocks) { mutex_unlock(&priv->pie_mutex); return -EOPNOTSUPP; } @@ -1415,18 +1415,18 @@ static void rtl931x_pie_init(struct rtl838x_switch_priv *priv) sw_w32_mask(0, 1, RTL931X_METER_GLB_CTRL); /* Delete all present rules, block size is 128 on all SoC families */ - rtl931x_pie_rule_del(priv, 0, priv->n_pie_blocks * 128 - 1); + rtl931x_pie_rule_del(priv, 0, priv->r->n_pie_blocks * 128 - 1); /* Assign first half blocks 0-7 to VACL phase, second half to IACL */ /* 3 bits are used for each block, values for PIE blocks are */ /* 6: Disabled, 0: VACL, 1: IACL, 2: EACL */ /* And for OpenFlow Flow blocks: 3: Ingress Flow table 0, */ /* 4: Ingress Flow Table 3, 5: Egress flow table 0 */ - for (int i = 0; i < priv->n_pie_blocks; i++) { + for (int i = 0; i < priv->r->n_pie_blocks; i++) { int pos = (i % 10) * 3; u32 r = RTL931X_PIE_BLK_PHASE_CTRL + 4 * (i / 10); - if (i < priv->n_pie_blocks / 2) + if (i < priv->r->n_pie_blocks / 2) sw_w32_mask(0x7 << pos, 0, r); else sw_w32_mask(0x7 << pos, 1 << pos, r); @@ -1434,22 +1434,22 @@ static void rtl931x_pie_init(struct rtl838x_switch_priv *priv) /* Enable predefined templates 0, 1 for first quarter of all blocks */ template_selectors = 0 | (1 << 4); - for (int i = 0; i < priv->n_pie_blocks / 4; i++) + for (int i = 0; i < priv->r->n_pie_blocks / 4; i++) sw_w32(template_selectors, RTL931X_PIE_BLK_TMPLTE_CTRL(i)); /* Enable predefined templates 2, 3 for second quarter of all blocks */ template_selectors = 2 | (3 << 4); - for (int i = priv->n_pie_blocks / 4; i < priv->n_pie_blocks / 2; i++) + for (int i = priv->r->n_pie_blocks / 4; i < priv->r->n_pie_blocks / 2; i++) sw_w32(template_selectors, RTL931X_PIE_BLK_TMPLTE_CTRL(i)); /* Enable predefined templates 0, 1 for third quater of all blocks */ template_selectors = 0 | (1 << 4); - for (int i = priv->n_pie_blocks / 2; i < priv->n_pie_blocks * 3 / 4; i++) + for (int i = priv->r->n_pie_blocks / 2; i < priv->r->n_pie_blocks * 3 / 4; i++) sw_w32(template_selectors, RTL931X_PIE_BLK_TMPLTE_CTRL(i)); /* Enable predefined templates 2, 3 for fourth quater of all blocks */ template_selectors = 2 | (3 << 4); - for (int i = priv->n_pie_blocks * 3 / 4; i < priv->n_pie_blocks; i++) + for (int i = priv->r->n_pie_blocks * 3 / 4; i < priv->r->n_pie_blocks; i++) sw_w32(template_selectors, RTL931X_PIE_BLK_TMPLTE_CTRL(i)); } @@ -1802,6 +1802,7 @@ const struct rtldsa_config rtldsa_931x_cfg = { .imr_port_link_sts_chg = RTL931X_IMR_PORT_LINK_STS_CHG, /* imr_glb does not exist on RTL931X */ .n_counters = 2048, + .n_pie_blocks = 16, .port_ignore = 0x3f, .vlan_tables_read = rtl931x_vlan_tables_read, .vlan_set_tagged = rtl931x_vlan_set_tagged, -- 2.47.3