From 9a60cde1b26cdf556a22aad8966a074ab2bb98c7 Mon Sep 17 00:00:00 2001
From: Julian Seward <jseward@acm.org>
Date: Tue, 13 May 2008 10:47:29 +0000
Subject: [PATCH] Merge r1816,1817,1833: specialise NZ after SUBW(16) and NS
 after SUBB(8), on both x86 and amd64.

git-svn-id: svn://svn.valgrind.org/vex/branches/VEX_3_3_BRANCH@1847
---
 VEX/priv/guest-amd64/ghelpers.c | 19 +++++++++++++++++++
 VEX/priv/guest-x86/ghelpers.c   | 19 +++++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/VEX/priv/guest-amd64/ghelpers.c b/VEX/priv/guest-amd64/ghelpers.c
index e76ed0defb..355727e9ae 100644
--- a/VEX/priv/guest-amd64/ghelpers.c
+++ b/VEX/priv/guest-amd64/ghelpers.c
@@ -1001,6 +1001,13 @@ IRExpr* guest_amd64_spechelper ( HChar* function_name,
                            unop(Iop_64to16,cc_dep1),
                            unop(Iop_64to16,cc_dep2)));
       }
+      if (isU64(cc_op, AMD64G_CC_OP_SUBW) && isU64(cond, AMD64CondNZ)) {
+         /* word sub/cmp, then NZ --> test dst!=src */
+         return unop(Iop_1Uto64,
+                     binop(Iop_CmpNE16, 
+                           unop(Iop_64to16,cc_dep1),
+                           unop(Iop_64to16,cc_dep2)));
+      }
 
       if (isU64(cc_op, AMD64G_CC_OP_SUBW) && isU64(cond, AMD64CondLE)) {
          /* word sub/cmp, then LE (signed less than or equal) 
@@ -1043,6 +1050,18 @@ IRExpr* guest_amd64_spechelper ( HChar* function_name,
                       binop(Iop_Shr64,cc_dep1,mkU8(7)),
                       mkU64(1));
       }
+      if (isU64(cc_op, AMD64G_CC_OP_SUBB) && isU64(cond, AMD64CondNS)
+                                          && isU64(cc_dep2, 0)) {
+         /* byte sub/cmp of zero, then NS --> test !(dst-0 <s 0)
+                                          --> test !(dst <s 0)
+                                          --> (ULong) !dst[7]
+         */
+         return binop(Iop_Xor64,
+                      binop(Iop_And64,
+                            binop(Iop_Shr64,cc_dep1,mkU8(7)),
+                            mkU64(1)),
+                      mkU64(1));
+      }
 
       /*---------------- LOGICQ ----------------*/
 
diff --git a/VEX/priv/guest-x86/ghelpers.c b/VEX/priv/guest-x86/ghelpers.c
index 949a10e896..58317a593f 100644
--- a/VEX/priv/guest-x86/ghelpers.c
+++ b/VEX/priv/guest-x86/ghelpers.c
@@ -925,6 +925,13 @@ IRExpr* guest_x86_spechelper ( HChar* function_name,
                            unop(Iop_32to16,cc_dep1), 
                            unop(Iop_32to16,cc_dep2)));
       }
+      if (isU32(cc_op, X86G_CC_OP_SUBW) && isU32(cond, X86CondNZ)) {
+         /* word sub/cmp, then NZ --> test dst!=src */
+         return unop(Iop_1Uto32,
+                     binop(Iop_CmpNE16, 
+                           unop(Iop_32to16,cc_dep1), 
+                           unop(Iop_32to16,cc_dep2)));
+      }
 
       /*---------------- SUBB ----------------*/
 
@@ -967,6 +974,18 @@ IRExpr* guest_x86_spechelper ( HChar* function_name,
                       binop(Iop_Shr32,cc_dep1,mkU8(7)),
                       mkU32(1));
       }
+      if (isU32(cc_op, X86G_CC_OP_SUBB) && isU32(cond, X86CondNS)
+                                        && isU32(cc_dep2, 0)) {
+         /* byte sub/cmp of zero, then NS --> test !(dst-0 <s 0) 
+                                          --> test !(dst <s 0)
+                                          --> (UInt) !dst[7] 
+         */
+         return binop(Iop_Xor32,
+                      binop(Iop_And32,
+                            binop(Iop_Shr32,cc_dep1,mkU8(7)),
+                            mkU32(1)),
+                mkU32(1));
+      }
 
       /*---------------- LOGICL ----------------*/
 
-- 
2.47.2