From a84836a4020e0d19d5ce9d5d3e25092bd60d282f Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Wed, 18 Jun 2014 22:01:37 +0200 Subject: [PATCH] backport: re PR target/61423 (Incorrect conversion from unsigned int to floating point) Backport from mainline 2014-06-06 Uros Bizjak PR target/61423 * config/i386/i386.md (*floatunssi2_i387_with_xmm): New define_insn_and_split pattern, merged from *floatunssi2_1 and corresponding splitters. Zero extend general register or memory input operand to XMM temporary. Enable for TARGET_SSE2 and TARGET_INTER_UNIT_MOVES_TO_VEC only. (floatunssi2): Update expander predicate. testsuite/ChangeLog: Backport from mainline 2014-06-13 Ilya Enkovich PR rtl-optimization/61094 PR rtl-optimization/61446 * gcc.target/i386/pr61446.c : New. Backport from mainline 2014-06-06 Uros Bizjak PR target/61423 * gcc.target/i386/pr61423.c: New test. From-SVN: r211803 --- gcc/ChangeLog | 13 ++++++ gcc/config/i386/i386.md | 61 +++++++------------------ gcc/testsuite/ChangeLog | 15 ++++++ gcc/testsuite/gcc.target/i386/pr61423.c | 38 +++++++++++++++ gcc/testsuite/gcc.target/i386/pr61446.c | 14 ++++++ 5 files changed, 96 insertions(+), 45 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr61423.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61446.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0652ed5f3c65..c9bcd2abc4c2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2014-06-18 Uros Bizjak + + Backport from mainline + 2014-06-06 Uros Bizjak + + PR target/61423 + * config/i386/i386.md (*floatunssi2_i387_with_xmm): New + define_insn_and_split pattern, merged from *floatunssi2_1 + and corresponding splitters. Zero extend general register + or memory input operand to XMM temporary. Enable for + TARGET_SSE2 and TARGET_INTER_UNIT_MOVES_TO_VEC only. + (floatunssi2): Update expander predicate. + 2014-06-18 Richard Henderson PR target/61545 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 891d4d4f3edb..d5055943f136 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5339,66 +5339,37 @@ ;; Avoid store forwarding (partial memory) stall penalty by extending ;; SImode value to DImode through XMM register instead of pushing two -;; SImode values to stack. Note that even !TARGET_INTER_UNIT_MOVES -;; targets benefit from this optimization. Also note that fild -;; loads from memory only. +;; SImode values to stack. Also note that fild loads from memory only. -(define_insn "*floatunssi2_1" - [(set (match_operand:X87MODEF 0 "register_operand" "=f,f") +(define_insn_and_split "*floatunssi2_i387_with_xmm" + [(set (match_operand:X87MODEF 0 "register_operand" "=f") (unsigned_float:X87MODEF - (match_operand:SI 1 "nonimmediate_operand" "x,m"))) - (clobber (match_operand:DI 2 "memory_operand" "=m,m")) - (clobber (match_scratch:SI 3 "=X,x"))] + (match_operand:SI 1 "nonimmediate_operand" "rm"))) + (clobber (match_scratch:DI 3 "=x")) + (clobber (match_operand:DI 2 "memory_operand" "=m"))] "!TARGET_64BIT && TARGET_80387 && X87_ENABLE_FLOAT (mode, DImode) - && TARGET_SSE" + && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES" "#" - [(set_attr "type" "multi") - (set_attr "mode" "")]) - -(define_split - [(set (match_operand:X87MODEF 0 "register_operand") - (unsigned_float:X87MODEF - (match_operand:SI 1 "register_operand"))) - (clobber (match_operand:DI 2 "memory_operand")) - (clobber (match_scratch:SI 3))] - "!TARGET_64BIT - && TARGET_80387 && X87_ENABLE_FLOAT (mode, DImode) - && TARGET_SSE - && reload_completed" - [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) - (float:X87MODEF (match_dup 2)))] - "operands[1] = simplify_gen_subreg (DImode, operands[1], SImode, 0);") - -(define_split - [(set (match_operand:X87MODEF 0 "register_operand") - (unsigned_float:X87MODEF - (match_operand:SI 1 "memory_operand"))) - (clobber (match_operand:DI 2 "memory_operand")) - (clobber (match_scratch:SI 3))] - "!TARGET_64BIT - && TARGET_80387 && X87_ENABLE_FLOAT (mode, DImode) - && TARGET_SSE - && reload_completed" - [(set (match_dup 2) (match_dup 3)) + "&& reload_completed" + [(set (match_dup 3) (zero_extend:DI (match_dup 1))) + (set (match_dup 2) (match_dup 3)) (set (match_dup 0) (float:X87MODEF (match_dup 2)))] -{ - emit_move_insn (operands[3], operands[1]); - operands[3] = simplify_gen_subreg (DImode, operands[3], SImode, 0); -}) + "" + [(set_attr "type" "multi") + (set_attr "mode" "")]) (define_expand "floatunssi2" [(parallel [(set (match_operand:X87MODEF 0 "register_operand") (unsigned_float:X87MODEF (match_operand:SI 1 "nonimmediate_operand"))) - (clobber (match_dup 2)) - (clobber (match_scratch:SI 3))])] + (clobber (match_scratch:DI 3)) + (clobber (match_dup 2))])] "!TARGET_64BIT && ((TARGET_80387 && X87_ENABLE_FLOAT (mode, DImode) - && TARGET_SSE) + && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES) || (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH))" { if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8418873c3d9a..5ff54daac140 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,18 @@ +2014-06-18 Uros Bizjak + + Backport from mainline + 2014-06-13 Ilya Enkovich + + PR rtl-optimization/61094 + PR rtl-optimization/61446 + * gcc.target/i386/pr61446.c : New. + + Backport from mainline + 2014-06-06 Uros Bizjak + + PR target/61423 + * gcc.target/i386/pr61423.c: New test. + 2014-06-17 Yufeng Zhang Backport from mainline diff --git a/gcc/testsuite/gcc.target/i386/pr61423.c b/gcc/testsuite/gcc.target/i386/pr61423.c new file mode 100644 index 000000000000..5b538a265086 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61423.c @@ -0,0 +1,38 @@ +/* PR target/61423 */ +/* { dg-do run { target ia32 } } */ +/* { dg-options "-O1 -ftree-vectorize -msse2 -mfpmath=387 -mtune=core2" } */ + +#define N 1024 +static unsigned int A[N]; + +double +__attribute__((noinline)) +func (void) +{ + unsigned int sum = 0; + unsigned i; + double t; + + for (i = 0; i < N; i++) + sum += A[i]; + + t = sum; + return t; +} + +int +main () +{ + unsigned i; + double d; + + for(i = 0; i < N; i++) + A[i] = 1; + + d = func(); + + if (d != 1024.0) + __builtin_abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr61446.c b/gcc/testsuite/gcc.target/i386/pr61446.c new file mode 100644 index 000000000000..fc32f63ee695 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61446.c @@ -0,0 +1,14 @@ +/* PR rtl-optimization/61446 */ + +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -march=corei7 -mfpmath=387" } */ + +unsigned long long +foo (float a) +{ + const double dfa = a; + const unsigned int hi = dfa / 0x1p32f; + const unsigned int lo = dfa - (double) hi * 0x1p32f; + + return ((unsigned long long) hi << (4 * (8))) | lo; +} -- 2.47.2