From a8704dc9d5f00bff9f52cf626f129ac1c6520d65 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Tue, 29 Nov 2022 16:45:10 +0100 Subject: [PATCH] arm: improve tests for vld2q* gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vld2q_f16.c: Use check-function-bodies instead of scan-assembler checks. Use extern "C" for C++ testing. * gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise. --- .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 ++++++++++++++++--- 8 files changed, 224 insertions(+), 40 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c index 24e7a2ea4d03..81690b1022ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ float16x8x2_t -foo (float16_t const * addr) +foo (float16_t const *addr) { return vld2q_f16 (addr); } -/* { dg-final { scan-assembler "vld20.16" } } */ -/* { dg-final { scan-assembler "vld21.16" } } */ +/* +**foo1: +** ... +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ float16x8x2_t -foo1 (float16_t const * addr) +foo1 (float16_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c index 727484caaf60..d2ae31fa9e51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ float32x4x2_t -foo (float32_t const * addr) +foo (float32_t const *addr) { return vld2q_f32 (addr); } -/* { dg-final { scan-assembler "vld20.32" } } */ -/* { dg-final { scan-assembler "vld21.32" } } */ +/* +**foo1: +** ... +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ float32x4x2_t -foo1 (float32_t const * addr) +foo1 (float32_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c index f2864a004784..fb4dc1b4fcfd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ int16x8x2_t -foo (int16_t const * addr) +foo (int16_t const *addr) { return vld2q_s16 (addr); } -/* { dg-final { scan-assembler "vld20.16" } } */ -/* { dg-final { scan-assembler "vld21.16" } } */ +/* +**foo1: +** ... +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ int16x8x2_t -foo1 (int16_t const * addr) +foo1 (int16_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c index 9fe2e0459b55..aeb85238fd26 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ int32x4x2_t -foo (int32_t const * addr) +foo (int32_t const *addr) { return vld2q_s32 (addr); } -/* { dg-final { scan-assembler "vld20.32" } } */ -/* { dg-final { scan-assembler "vld21.32" } } */ +/* +**foo1: +** ... +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ int32x4x2_t -foo1 (int32_t const * addr) +foo1 (int32_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c index 736080a94a76..687e5ded48c3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ int8x16x2_t -foo (int8_t const * addr) +foo (int8_t const *addr) { return vld2q_s8 (addr); } -/* { dg-final { scan-assembler "vld20.8" } } */ -/* { dg-final { scan-assembler "vld21.8" } } */ +/* +**foo1: +** ... +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ int8x16x2_t -foo1 (int8_t const * addr) +foo1 (int8_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c index 2d89ebdcf6bb..281fe5eaf101 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ uint16x8x2_t -foo (uint16_t const * addr) +foo (uint16_t const *addr) { return vld2q_u16 (addr); } -/* { dg-final { scan-assembler "vld20.16" } } */ -/* { dg-final { scan-assembler "vld21.16" } } */ +/* +**foo1: +** ... +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ uint16x8x2_t -foo1 (uint16_t const * addr) +foo1 (uint16_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c index 28d311eca68d..524afee72e9d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ uint32x4x2_t -foo (uint32_t const * addr) +foo (uint32_t const *addr) { return vld2q_u32 (addr); } -/* { dg-final { scan-assembler "vld20.32" } } */ -/* { dg-final { scan-assembler "vld21.32" } } */ +/* +**foo1: +** ... +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ uint32x4x2_t -foo1 (uint32_t const * addr) +foo1 (uint32_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c index 790c9743c9a7..9eebbd42719d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c @@ -1,22 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ uint8x16x2_t -foo (uint8_t const * addr) +foo (uint8_t const *addr) { return vld2q_u8 (addr); } -/* { dg-final { scan-assembler "vld20.8" } } */ -/* { dg-final { scan-assembler "vld21.8" } } */ +/* +**foo1: +** ... +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ uint8x16x2_t -foo1 (uint8_t const * addr) +foo1 (uint8_t const *addr) { return vld2q (addr); } -/* { dg-final { scan-assembler "vld20.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file -- 2.47.2