From adee0d6614349ab06e4a7766139803609a891fda Mon Sep 17 00:00:00 2001 From: Chancel Liu Date: Mon, 1 Dec 2025 15:58:43 +0900 Subject: [PATCH] arm64: dts: imx93-14x14-evk: Add bt-sco sound card support Add bt-sco sound card, which is used by BT HFP case. It supports wb profile as default. Signed-off-by: Chancel Liu Reviewed-by: Frank Li Signed-off-by: Shawn Guo --- .../boot/dts/freescale/imx93-14x14-evk.dts | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts index f9eebd27d640c..e47fee24471a6 100644 --- a/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts @@ -27,6 +27,11 @@ serial0 = &lpuart1; }; + bt_sco_codec: bt-sco-codec { + compatible = "linux,bt-sco"; + #sound-dai-cells = <1>; + }; + chosen { stdout-path = &lpuart1; }; @@ -168,6 +173,25 @@ regulator-max-microvolt = <1800000>; }; + sound-bt-sco { + compatible = "simple-audio-card"; + simple-audio-card,name = "bt-sco-audio"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion; + simple-audio-card,frame-master = <&btcpu>; + simple-audio-card,bitclock-master = <&btcpu>; + + simple-audio-card,codec { + sound-dai = <&bt_sco_codec 1>; + }; + + btcpu: simple-audio-card,cpu { + sound-dai = <&sai1>; + dai-tdm-slot-num = <2>; + dai-tdm-slot-width = <16>; + }; + }; + usdhc3_pwrseq: usdhc3_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&pcal6524 12 GPIO_ACTIVE_LOW>; @@ -371,6 +395,16 @@ status = "okay"; }; +&sai1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai1>; + assigned-clocks = <&clk IMX93_CLK_SAI1>; + assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>; + assigned-clock-rates = <12288000>; + fsl,sai-mclk-direction-output; + status = "okay"; +}; + &usbotg1 { dr_mode = "otg"; hnp-disable; @@ -568,6 +602,15 @@ >; }; + pinctrl_sai1: sai1grp { + fsl,pins = < + MX93_PAD_SAI1_TXC__SAI1_TX_BCLK 0x31e + MX93_PAD_SAI1_TXFS__SAI1_TX_SYNC 0x31e + MX93_PAD_SAI1_TXD0__SAI1_TX_DATA00 0x31e + MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00 0x31e + >; + }; + pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins = < MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e -- 2.47.3