From ae8694393e13f563209fad681e5bc1b99d558646 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 3 Nov 2025 19:45:54 +0000 Subject: [PATCH] media: dt-bindings: media: renesas,fcp: Allow three clocks for RZ/V2N SoC Update the FCP DT schema to permit three clock inputs for the RZ/V2N SoC. The FCP block on this SoC requires three separate clocks, unlike other variants which use only one. Fixes: f42eddf44fbf ("media: dt-bindings: media: renesas,fcp: Document RZ/V2N SoC") Signed-off-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Conor Dooley Link: https://patch.msgid.link/20251103194554.54313-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/renesas,fcp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml index cf92dfe69637c..b5eff6fec8a98 100644 --- a/Documentation/devicetree/bindings/media/renesas,fcp.yaml +++ b/Documentation/devicetree/bindings/media/renesas,fcp.yaml @@ -77,6 +77,7 @@ allOf: - renesas,r9a07g043u-fcpvd - renesas,r9a07g044-fcpvd - renesas,r9a07g054-fcpvd + - renesas,r9a09g056-fcpvd - renesas,r9a09g057-fcpvd then: properties: -- 2.47.3