From aebd8471a172706fe645c4fc931b085d4f040b49 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Tue, 9 May 2023 07:43:32 +0100 Subject: [PATCH] aarch64: Fix move-after-intrinsic function-body tests Some of the SVE ACLE asm tests tried to be agnostic about the instruction order, but only one of the alternatives was exercised in practice. This patch fixes latent typos in the other versions. gcc/testsuite/ * gcc.target/aarch64/sve2/acle/asm/aesd_u8.c: Fix expected register allocation in the case where a move occurs after the intrinsic instruction. * gcc.target/aarch64/sve2/acle/asm/aese_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c: Likewise. --- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c | 4 ++-- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c | 4 ++-- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c index 622f5cf4609c..384b6ffc9aae 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesd_u8.c @@ -28,13 +28,13 @@ TEST_UNIFORM_Z (aesd_u8_tied2, svuint8_t, ** mov z0\.d, z1\.d ** aesd z0\.b, z0\.b, z2\.b ** | -** aesd z1\.b, z0\.b, z2\.b +** aesd z1\.b, z1\.b, z2\.b ** mov z0\.d, z1\.d ** | ** mov z0\.d, z2\.d ** aesd z0\.b, z0\.b, z1\.b ** | -** aesd z2\.b, z0\.b, z1\.b +** aesd z2\.b, z2\.b, z1\.b ** mov z0\.d, z2\.d ** ) ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c index 6555bbb1de76..6381bce16617 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aese_u8.c @@ -28,13 +28,13 @@ TEST_UNIFORM_Z (aese_u8_tied2, svuint8_t, ** mov z0\.d, z1\.d ** aese z0\.b, z0\.b, z2\.b ** | -** aese z1\.b, z0\.b, z2\.b +** aese z1\.b, z1\.b, z2\.b ** mov z0\.d, z1\.d ** | ** mov z0\.d, z2\.d ** aese z0\.b, z0\.b, z1\.b ** | -** aese z2\.b, z0\.b, z1\.b +** aese z2\.b, z2\.b, z1\.b ** mov z0\.d, z2\.d ** ) ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c index 4630595ff209..76259326467a 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c @@ -19,7 +19,7 @@ TEST_UNIFORM_Z (aesimc_u8_tied1, svuint8_t, ** mov z0\.d, z1\.d ** aesimc z0\.b, z0\.b ** | -** aesimc z1\.b, z0\.b +** aesimc z1\.b, z1\.b ** mov z0\.d, z1\.d ** ) ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c index 6e8acf48f2af..30e83d381dcd 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c @@ -19,7 +19,7 @@ TEST_UNIFORM_Z (aesmc_u8_tied1, svuint8_t, ** mov z0\.d, z1\.d ** aesmc z0\.b, z0\.b ** | -** aesmc z1\.b, z0\.b +** aesmc z1\.b, z1\.b ** mov z0\.d, z1\.d ** ) ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c index 0ff5746d814b..cf6a2a95235b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c @@ -24,7 +24,7 @@ TEST_UNIFORM_Z (sm4e_u32_tied2, svuint32_t, ** mov z0\.d, z1\.d ** sm4e z0\.s, z0\.s, z2\.s ** | -** sm4e z1\.s, z0\.s, z2\.s +** sm4e z1\.s, z1\.s, z2\.s ** mov z0\.d, z1\.d ** ) ** ret -- 2.47.2