From afb4ac68f03545aafe3e3e08f6963be13f7aa955 Mon Sep 17 00:00:00 2001 From: Alexander Ivchenko Date: Tue, 15 Oct 2013 14:33:34 +0000 Subject: [PATCH] sse.md (unspec): Add UNSPEC_RCP14... * config/i386/sse.md (unspec): Add UNSPEC_RCP14, UNSPEC_RSQRT14, UNSPEC_FIXUPIMM, UNSPEC_SCALEF, UNSPEC_GETEXP, UNSPEC_GETMANT, UNSPEC_EXP2, UNSPEC_RCP28, UNSPEC_RSQRT28. (rcp14): New. (srcp14): Ditto. (rsqrt14): Ditto. (rsqrt14): Ditto. (avx512f_vmscalef): Ditto. (avx512f_scalef): Ditto. (avx512f_getexp): Ditto. (avx512f_sgetexp): Ditto. (avx512f_fixupimm): Ditto. (avx512f_sfixupimm): Ditto. (avx512f_rndscale): Ditto. (*avx512er_exp2): Ditto. (*avx512er_rcp28): Ditto. (avx512er_rsqrt28): Ditto. (avx512f_getmant): Ditto. (avx512f_getmant): Ditto. (avx512f_rndscale): Fix formatting. Co-Authored-By: Andrey Turetskiy Co-Authored-By: Anna Tikhonova Co-Authored-By: Ilya Tocar Co-Authored-By: Ilya Verbin Co-Authored-By: Kirill Yukhin Co-Authored-By: Maxim Kuznetsov Co-Authored-By: Michael Zolotukhin Co-Authored-By: Sergey Lega From-SVN: r203609 --- gcc/ChangeLog | 32 ++++++ gcc/config/i386/sse.md | 217 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 245 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ee591c070083..974c778fc9fc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,35 @@ +2013-10-15 Alexander Ivchenko + Maxim Kuznetsov + Sergey Lega + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * config/i386/sse.md (unspec): Add UNSPEC_RCP14, UNSPEC_RSQRT14, + UNSPEC_FIXUPIMM, UNSPEC_SCALEF, UNSPEC_GETEXP, UNSPEC_GETMANT, + UNSPEC_EXP2, UNSPEC_RCP28, UNSPEC_RSQRT28. + (rcp14): New. + (srcp14): Ditto. + (rsqrt14): Ditto. + (rsqrt14): Ditto. + (avx512f_vmscalef): Ditto. + (avx512f_scalef): Ditto. + (avx512f_getexp): Ditto. + (avx512f_sgetexp): Ditto. + (avx512f_fixupimm): Ditto. + (avx512f_sfixupimm): Ditto. + (avx512f_rndscale): Ditto. + (*avx512er_exp2): Ditto. + (*avx512er_rcp28): Ditto. + (avx512er_rsqrt28): Ditto. + (avx512f_getmant): Ditto. + (avx512f_getmant): Ditto. + (avx512f_rndscale): Fix formatting. + + 2013-10-15 Alexander Ivchenko Maxim Kuznetsov Sergey Lega diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 4655e99de040..2046dd58c9b6 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -91,7 +91,13 @@ UNSPEC_TESTM UNSPEC_TESTNM UNSPEC_SCATTER + UNSPEC_RCP14 + UNSPEC_RSQRT14 + UNSPEC_FIXUPIMM + UNSPEC_SCALEF UNSPEC_VTERNLOG + UNSPEC_GETEXP + UNSPEC_GETMANT UNSPEC_ALIGN UNSPEC_CONFLICT UNSPEC_MASKED_EQ @@ -100,6 +106,11 @@ ;; For AVX512PF support UNSPEC_GATHER_PREFETCH UNSPEC_SCATTER_PREFETCH + + ;; For AVX512ER support + UNSPEC_EXP2 + UNSPEC_RCP28 + UNSPEC_RSQRT28 ]) (define_c_enum "unspecv" [ @@ -1254,6 +1265,32 @@ (set_attr "prefix" "orig,vex") (set_attr "mode" "SF")]) +(define_insn "rcp14" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm")] + UNSPEC_RCP14))] + "TARGET_AVX512F" + "vrcp14\t{%1, %0|%0, %1}" + [(set_attr "type" "sse") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "srcp14" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 + [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm")] + UNSPEC_RCP14) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "vrcp14\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "sse") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_expand "sqrt2" [(set (match_operand:VF2 0 "register_operand") (sqrt:VF2 (match_operand:VF2 1 "nonimmediate_operand")))] @@ -1324,6 +1361,32 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "")]) +(define_insn "rsqrt14" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm")] + UNSPEC_RSQRT14))] + "TARGET_AVX512F" + "vrsqrt14\t{%1, %0|%0, %1}" + [(set_attr "type" "sse") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "rsqrt14" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 + [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm")] + UNSPEC_RSQRT14) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "vrsqrt14\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "sse") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_insn "sse_vmrsqrtv4sf2" [(set (match_operand:V4SF 0 "register_operand" "=x,x") (vec_merge:V4SF @@ -5305,6 +5368,29 @@ operands[1] = adjust_address (operands[1], DFmode, INTVAL (operands[2]) * 8); }) +(define_insn "avx512f_vmscalef" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm")] + UNSPEC_SCALEF) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "%vscalef\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "avx512f_scalef" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 [(match_operand:VF_512 1 "register_operand" "v") + (match_operand:VF_512 2 "nonimmediate_operand" "vm")] + UNSPEC_SCALEF))] + "TARGET_AVX512F" + "%vscalef\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_insn "avx512f_vternlog" [(set (match_operand:VI48_512 0 "register_operand" "=v") (unspec:VI48_512 @@ -5319,6 +5405,28 @@ (set_attr "prefix" "evex") (set_attr "mode" "")]) +(define_insn "avx512f_getexp" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 [(match_operand:VF_512 1 "nonimmediate_operand" "vm")] + UNSPEC_GETEXP))] + "TARGET_AVX512F" + "vgetexp\t{%1, %0|%0, %1}"; + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "avx512f_sgetexp" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm")] + UNSPEC_GETEXP) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "vgetexp\t{%2, %1, %0|%0, %1, %2}"; + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_insn "avx512f_align" [(set (match_operand:VI48_512 0 "register_operand" "=v") (unspec:VI48_512 [(match_operand:VI48_512 1 "register_operand" "v") @@ -5330,18 +5438,63 @@ [(set_attr "prefix" "evex") (set_attr "mode" "")]) +(define_insn "avx512f_fixupimm" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "register_operand" "0") + (match_operand:VF_512 2 "register_operand" "v") + (match_operand: 3 "nonimmediate_operand" "vm") + (match_operand:SI 4 "const_0_to_255_operand")] + UNSPEC_FIXUPIMM))] + "TARGET_AVX512F" + "vfixupimm\t{%4, %3, %2, %0|%0, %2, %3, %4}"; + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "avx512f_sfixupimm" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 + [(match_operand:VF_128 1 "register_operand" "0") + (match_operand:VF_128 2 "register_operand" "v") + (match_operand: 3 "nonimmediate_operand" "vm") + (match_operand:SI 4 "const_0_to_255_operand")] + UNSPEC_FIXUPIMM) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "vfixupimm\t{%4, %3, %2, %0|%0, %2, %3, %4}"; + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_insn "avx512f_rndscale" [(set (match_operand:VF_512 0 "register_operand" "=v") - (unspec:VF_512 - [(match_operand:VF_512 1 "nonimmediate_operand" "vm") - (match_operand:SI 2 "const_0_to_255_operand")] - UNSPEC_ROUND))] + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm") + (match_operand:SI 2 "const_0_to_255_operand")] + UNSPEC_ROUND))] "TARGET_AVX512F" "vrndscale\t{%2, %1, %0|%0, %1, %2}" [(set_attr "length_immediate" "1") (set_attr "prefix" "evex") (set_attr "mode" "")]) +(define_insn "avx512f_rndscale" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 + [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm") + (match_operand:SI 3 "const_0_to_255_operand")] + UNSPEC_ROUND) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "vrndscale\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "length_immediate" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_expand "avx_shufpd256" [(match_operand:V4DF 0 "register_operand") (match_operand:V4DF 1 "register_operand") @@ -10501,6 +10654,36 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) +(define_insn "*avx512er_exp2" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm")] + UNSPEC_EXP2))] + "TARGET_AVX512ER" + "vexp2\t{%1, %0|%0, %1}" + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "*avx512er_rcp28" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm")] + UNSPEC_RCP28))] + "TARGET_AVX512ER" + "vrcp28\t{%1, %0|%0, %1}" + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "avx512er_rsqrt28" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm")] + UNSPEC_RSQRT28))] + "TARGET_AVX512ER" + "vrsqrt28\t{%1, %0|%0, %1}" + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; XOP instructions @@ -12827,6 +13010,32 @@ (set_attr "prefix" "evex") (set_attr "mode" "")]) +(define_insn "avx512f_getmant" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (unspec:VF_512 + [(match_operand:VF_512 1 "nonimmediate_operand" "vm") + (match_operand:SI 2 "const_0_to_15_operand")] + UNSPEC_GETMANT))] + "TARGET_AVX512F" + "vgetmant\t{%2, %1, %0|%0, %1, %2}"; + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_insn "avx512f_getmant" + [(set (match_operand:VF_128 0 "register_operand" "=v") + (vec_merge:VF_128 + (unspec:VF_128 + [(match_operand:VF_128 1 "register_operand" "v") + (match_operand:VF_128 2 "nonimmediate_operand" "vm") + (match_operand:SI 3 "const_0_to_15_operand")] + UNSPEC_GETMANT) + (match_dup 1) + (const_int 1)))] + "TARGET_AVX512F" + "vgetmant\t{%3, %2, %1, %0|%0, %1, %2, %3}"; + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_insn "clz2" [(set (match_operand:VI48_512 0 "register_operand" "=v") (clz:VI48_512 -- 2.47.2