From b0afb81271a4e03f9bdee9442e4abfd7a0002cf6 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 27 Nov 2025 16:51:32 +0100 Subject: [PATCH] target/rx: Inline translator_lduw() and translator_ldl() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit translator_lduw() and translator_ldl() are defined in "exec/translator.h" as: 192 static inline uint16_t 193 translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) 194 { 195 return translator_lduw_end(env, db, pc, MO_TE); 196 } 198 static inline uint32_t 199 translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) 200 { 201 return translator_ldl_end(env, db, pc, MO_TE); 202 } Directly use the inlined form, expanding MO_TE -> mo_endian(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Richard Henderson Message-ID: <20251224163304.91384-4-philmd@linaro.org> --- target/rx/translate.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/rx/translate.c b/target/rx/translate.c index ef865f14bf..26d4154829 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -92,6 +92,7 @@ static uint32_t li(DisasContext *ctx, int sz) { vaddr addr; uint32_t tmp; + MemOp endian = mo_endian(ctx); CPURXState *env = ctx->env; addr = ctx->base.pc_next; @@ -101,16 +102,16 @@ static uint32_t li(DisasContext *ctx, int sz) return (int8_t)translator_ldub(env, &ctx->base, addr); case 2: ctx->base.pc_next += 2; - return (int16_t)translator_lduw(env, &ctx->base, addr); + return (int16_t) translator_lduw_end(env, &ctx->base, addr, endian); case 3: ctx->base.pc_next += 3; tmp = (int8_t)translator_ldub(env, &ctx->base, addr + 2); tmp <<= 16; - tmp |= translator_lduw(env, &ctx->base, addr); + tmp |= translator_lduw_end(env, &ctx->base, addr, endian); return tmp; case 0: ctx->base.pc_next += 4; - return translator_ldl(env, &ctx->base, addr); + return translator_ldl_end(env, &ctx->base, addr, endian); default: g_assert_not_reached(); } @@ -206,7 +207,8 @@ static TCGv_i32 rx_index_addr(DisasContext *ctx, TCGv_i32 mem, ctx->base.pc_next += 1; return mem; case 2: - dsp = translator_lduw(ctx->env, &ctx->base, ctx->base.pc_next) << size; + dsp = translator_lduw_end(ctx->env, &ctx->base, ctx->base.pc_next, + mo_endian(ctx)) << size; tcg_gen_addi_i32(mem, cpu_regs[reg], dsp); ctx->base.pc_next += 2; return mem; -- 2.47.3