From b1a9a9b96169bf1f9cb94b8aa33601996fad1e9c Mon Sep 17 00:00:00 2001 From: Mark Rutland Date: Tue, 6 Jan 2026 17:37:07 +0000 Subject: [PATCH] KVM: arm64: Remove ISB after writing FPEXC32_EL2 The value of FPEX32_EL2 has no effect on execution in AArch64 state, and consequently there's no need for an ISB after writing to it in the hyp code (which executes in AArch64 state). When performing an exception return to AArch32 state, the exception return will provide the necessary context synchronization event. Remove the redundant ISB. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Fuad Tabba Cc: Marc Zyngier Cc: Mark Brown Cc: Oliver Upton Cc: Will Deacon Tested-by: Fuad Tabba Reviewed-by: Fuad Tabba Link: https://patch.msgid.link/20260106173707.3292074-4-mark.rutland@arm.com Signed-off-by: Marc Zyngier --- arch/arm64/kvm/hyp/include/hyp/switch.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h index 8dce3da85da35..91aa1862349cb 100644 --- a/arch/arm64/kvm/hyp/include/hyp/switch.h +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h @@ -59,10 +59,8 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu) * If FP/ASIMD is not implemented, FPEXC is UNDEFINED and any access to * it will cause an exception. */ - if (vcpu_el1_is_32bit(vcpu) && system_supports_fpsimd()) { + if (vcpu_el1_is_32bit(vcpu) && system_supports_fpsimd()) write_sysreg(1 << 30, fpexc32_el2); - isb(); - } } static inline void __activate_cptr_traps_nvhe(struct kvm_vcpu *vcpu) -- 2.47.3