From b4062712ce54592a3361b766810a94e3b27dd51e Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Wed, 14 May 2014 23:38:23 +0000 Subject: [PATCH] Implement VFPv4 VFMA and VFMS (F32 and F64 versions). Fixes #331057. Patch from Janne Hellsten (jjhellst@gmail.com) with algebraic rearrangement for the VFMS cases so as to make result signs match with the hardware when some of the inputs are infinities. git-svn-id: svn://svn.valgrind.org/vex/trunk@2861 --- VEX/priv/guest_arm_toIR.c | 42 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c index e72ef3d3af..7ab367c0c2 100644 --- a/VEX/priv/guest_arm_toIR.c +++ b/VEX/priv/guest_arm_toIR.c @@ -13527,6 +13527,27 @@ static Bool decode_CP10_CP11_instruction ( condT); DIP("fdivd%s d%u, d%u, d%u\n", nCC(conq), dD, dN, dM); goto decode_success_vfp; + case BITS4(1,1,0,0): /* VFMA: d + n * m (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putDReg(dD, triop(Iop_AddF64, rm, + getDReg(dD), + triop(Iop_MulF64, rm, getDReg(dN), + getDReg(dM))), + condT); + DIP("vfmad%s d%u, d%u, d%u\n", nCC(conq), dD, dN, dM); + goto decode_success_vfp; + case BITS4(1,1,0,1): /* VFMS: d + (-n * m) (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putDReg(dD, triop(Iop_AddF64, rm, + getDReg(dD), + triop(Iop_MulF64, rm, + unop(Iop_NegF64, getDReg(dN)), + getDReg(dM))), + condT); + DIP("vfmsd%s d%u, d%u, d%u\n", nCC(conq), dD, dN, dM); + goto decode_success_vfp; default: break; } @@ -13991,6 +14012,27 @@ static Bool decode_CP10_CP11_instruction ( condT); DIP("fdivs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM); goto decode_success_vfp; + case BITS4(1,1,0,0): /* VFMA: d + n * m (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putFReg(fD, triop(Iop_AddF32, rm, + getFReg(fD), + triop(Iop_MulF32, rm, getFReg(fN), + getFReg(fM))), + condT); + DIP("vfmas%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM); + goto decode_success_vfp; + case BITS4(1,1,0,1): /* VFMS: d + (-n * m) (fused) */ + /* XXXROUNDINGFIXME look up ARM reference for fused + multiply-add rounding */ + putFReg(fD, triop(Iop_AddF32, rm, + getFReg(fD), + triop(Iop_MulF32, rm, + unop(Iop_NegF32, getFReg(fN)), + getFReg(fM))), + condT); + DIP("vfmss%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM); + goto decode_success_vfp; default: break; } -- 2.47.2