From b43889fcae25c247f2ad8e4a304a04b22532767c Mon Sep 17 00:00:00 2001 From: Radhey Shyam Pandey Date: Fri, 14 Nov 2025 18:02:39 +0530 Subject: [PATCH] dt-bindings: usb: dwc3-xilinx: Describe the reset constraint for the versal platform AMD Versal platform USB 2.0 IP controller receives one reset input from the SoC controlled by the CRL.RST_USB [RESET] register so accordingly describe reset constraints. Signed-off-by: Radhey Shyam Pandey Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20251114123239.1929255-1-radhey.shyam.pandey@amd.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/dwc3-xilinx.yaml | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml index 36f5c644d9590..d6823ef5f9a78 100644 --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml @@ -47,6 +47,7 @@ properties: - const: ref_clk resets: + minItems: 1 description: A list of phandles for resets listed in reset-names. @@ -56,6 +57,7 @@ properties: - description: USB APB reset reset-names: + minItems: 1 items: - const: usb_crst - const: usb_hibrst @@ -95,6 +97,26 @@ required: - resets - reset-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - xlnx,versal-dwc3 + then: + properties: + resets: + maxItems: 1 + reset-names: + maxItems: 1 + else: + properties: + resets: + minItems: 3 + reset-names: + minItems: 3 + additionalProperties: false examples: -- 2.47.3