From b660d7c33a20f37060541015244d81fe362a63a7 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sun, 3 Dec 2023 14:29:30 +0100 Subject: [PATCH] 6.6-stable patches added patches: dm-verity-don-t-perform-fec-for-failed-readahead-io.patch dm-verity-initialize-fec-io-before-freeing-it.patch drm-amd-display-fix-abm-disablement.patch drm-amd-display-force-toggle-rate-wa-for-first-link-training-for-a-retimer.patch drm-amd-display-include-udelay-when-waiting-for-inbox0-ack.patch drm-amd-display-remove-min_dst_y_next_start-check-for-z8.patch drm-amd-display-update-min-z8-residency-time-to-2100-for-dcn314.patch drm-amd-display-use-dram-speed-from-validation-for-dummy-p-state.patch drm-amd-enable-pcie-pme-from-d3.patch drm-amdgpu-correct-the-amdgpu-runtime-dereference-usage-count.patch drm-amdgpu-fix-memory-overflow-in-the-ib-test.patch drm-amdgpu-force-order-between-a-read-and-write-to-the-same-address.patch drm-amdgpu-update-eeprom-i2c-address-for-smu-v13_0_0.patch nvme-check-for-valid-nvme_identify_ns-before-using-it.patch scsi-change-scsi-device-boolean-fields-to-single-bit-flags.patch scsi-sd-fix-system-start-for-ata-devices.patch scsi-ufs-core-clear-cmd-if-abort-succeeds-in-mcq-mode.patch --- ...-perform-fec-for-failed-readahead-io.patch | 83 +++++++++++++++++ ...-initialize-fec-io-before-freeing-it.patch | 57 ++++++++++++ .../drm-amd-display-fix-abm-disablement.patch | 57 ++++++++++++ ...or-first-link-training-for-a-retimer.patch | 56 ++++++++++++ ...e-udelay-when-waiting-for-inbox0-ack.patch | 33 +++++++ ...ve-min_dst_y_next_start-check-for-z8.patch | 70 +++++++++++++++ ...z8-residency-time-to-2100-for-dcn314.patch | 37 ++++++++ ...ed-from-validation-for-dummy-p-state.patch | 44 +++++++++ .../drm-amd-enable-pcie-pme-from-d3.patch | 36 ++++++++ ...dgpu-runtime-dereference-usage-count.patch | 40 +++++++++ ...u-fix-memory-overflow-in-the-ib-test.patch | 81 +++++++++++++++++ ...a-read-and-write-to-the-same-address.patch | 58 ++++++++++++ ...e-eeprom-i2c-address-for-smu-v13_0_0.patch | 35 ++++++++ ...lid-nvme_identify_ns-before-using-it.patch | 75 ++++++++++++++++ ...e-boolean-fields-to-single-bit-flags.patch | 89 +++++++++++++++++++ ...-sd-fix-system-start-for-ata-devices.patch | 87 ++++++++++++++++++ ...ar-cmd-if-abort-succeeds-in-mcq-mode.patch | 58 ++++++++++++ queue-6.6/series | 17 ++++ 18 files changed, 1013 insertions(+) create mode 100644 queue-6.6/dm-verity-don-t-perform-fec-for-failed-readahead-io.patch create mode 100644 queue-6.6/dm-verity-initialize-fec-io-before-freeing-it.patch create mode 100644 queue-6.6/drm-amd-display-fix-abm-disablement.patch create mode 100644 queue-6.6/drm-amd-display-force-toggle-rate-wa-for-first-link-training-for-a-retimer.patch create mode 100644 queue-6.6/drm-amd-display-include-udelay-when-waiting-for-inbox0-ack.patch create mode 100644 queue-6.6/drm-amd-display-remove-min_dst_y_next_start-check-for-z8.patch create mode 100644 queue-6.6/drm-amd-display-update-min-z8-residency-time-to-2100-for-dcn314.patch create mode 100644 queue-6.6/drm-amd-display-use-dram-speed-from-validation-for-dummy-p-state.patch create mode 100644 queue-6.6/drm-amd-enable-pcie-pme-from-d3.patch create mode 100644 queue-6.6/drm-amdgpu-correct-the-amdgpu-runtime-dereference-usage-count.patch create mode 100644 queue-6.6/drm-amdgpu-fix-memory-overflow-in-the-ib-test.patch create mode 100644 queue-6.6/drm-amdgpu-force-order-between-a-read-and-write-to-the-same-address.patch create mode 100644 queue-6.6/drm-amdgpu-update-eeprom-i2c-address-for-smu-v13_0_0.patch create mode 100644 queue-6.6/nvme-check-for-valid-nvme_identify_ns-before-using-it.patch create mode 100644 queue-6.6/scsi-change-scsi-device-boolean-fields-to-single-bit-flags.patch create mode 100644 queue-6.6/scsi-sd-fix-system-start-for-ata-devices.patch create mode 100644 queue-6.6/scsi-ufs-core-clear-cmd-if-abort-succeeds-in-mcq-mode.patch diff --git a/queue-6.6/dm-verity-don-t-perform-fec-for-failed-readahead-io.patch b/queue-6.6/dm-verity-don-t-perform-fec-for-failed-readahead-io.patch new file mode 100644 index 00000000000..e9da7aeec63 --- /dev/null +++ b/queue-6.6/dm-verity-don-t-perform-fec-for-failed-readahead-io.patch @@ -0,0 +1,83 @@ +From 0193e3966ceeeef69e235975918b287ab093082b Mon Sep 17 00:00:00 2001 +From: Wu Bo +Date: Tue, 21 Nov 2023 20:51:50 -0700 +Subject: dm verity: don't perform FEC for failed readahead IO + +From: Wu Bo + +commit 0193e3966ceeeef69e235975918b287ab093082b upstream. + +We found an issue under Android OTA scenario that many BIOs have to do +FEC where the data under dm-verity is 100% complete and no corruption. + +Android OTA has many dm-block layers, from upper to lower: +dm-verity +dm-snapshot +dm-origin & dm-cow +dm-linear +ufs + +DM tables have to change 2 times during Android OTA merging process. +When doing table change, the dm-snapshot will be suspended for a while. +During this interval, many readahead IOs are submitted to dm_verity +from filesystem. Then the kverity works are busy doing FEC process +which cost too much time to finish dm-verity IO. This causes needless +delay which feels like system is hung. + +After adding debugging it was found that each readahead IO needed +around 10s to finish when this situation occurred. This is due to IO +amplification: + +dm-snapshot suspend +erofs_readahead // 300+ io is submitted + dm_submit_bio (dm_verity) + dm_submit_bio (dm_snapshot) + bio return EIO + bio got nothing, it's empty + verity_end_io + verity_verify_io + forloop range(0, io->n_blocks) // each io->nblocks ~= 20 + verity_fec_decode + fec_decode_rsb + fec_read_bufs + forloop range(0, v->fec->rsn) // v->fec->rsn = 253 + new_read + submit_bio (dm_snapshot) + end loop + end loop +dm-snapshot resume + +Readahead BIOs get nothing while dm-snapshot is suspended, so all of +them will cause verity's FEC. +Each readahead BIO needs to verify ~20 (io->nblocks) blocks. +Each block needs to do FEC, and every block needs to do 253 +(v->fec->rsn) reads. +So during the suspend interval(~200ms), 300 readahead BIOs trigger +~1518000 (300*20*253) IOs to dm-snapshot. + +As readahead IO is not required by userspace, and to fix this issue, +it is best to pass readahead errors to upper layer to handle it. + +Cc: stable@vger.kernel.org +Fixes: a739ff3f543a ("dm verity: add support for forward error correction") +Signed-off-by: Wu Bo +Reviewed-by: Mikulas Patocka +Signed-off-by: Mike Snitzer +Signed-off-by: Greg Kroah-Hartman +--- + drivers/md/dm-verity-target.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/md/dm-verity-target.c ++++ b/drivers/md/dm-verity-target.c +@@ -667,7 +667,9 @@ static void verity_end_io(struct bio *bi + struct dm_verity_io *io = bio->bi_private; + + if (bio->bi_status && +- (!verity_fec_is_enabled(io->v) || verity_is_system_shutting_down())) { ++ (!verity_fec_is_enabled(io->v) || ++ verity_is_system_shutting_down() || ++ (bio->bi_opf & REQ_RAHEAD))) { + verity_finish_io(io, bio->bi_status); + return; + } diff --git a/queue-6.6/dm-verity-initialize-fec-io-before-freeing-it.patch b/queue-6.6/dm-verity-initialize-fec-io-before-freeing-it.patch new file mode 100644 index 00000000000..a3e8b88a501 --- /dev/null +++ b/queue-6.6/dm-verity-initialize-fec-io-before-freeing-it.patch @@ -0,0 +1,57 @@ +From 7be05bdfb4efc1396f7692562c7161e2b9f595f1 Mon Sep 17 00:00:00 2001 +From: Wu Bo +Date: Tue, 21 Nov 2023 20:51:49 -0700 +Subject: dm verity: initialize fec io before freeing it + +From: Wu Bo + +commit 7be05bdfb4efc1396f7692562c7161e2b9f595f1 upstream. + +If BIO error, verity_end_io() can call verity_finish_io() before +verity_fec_init_io(). Therefore, fec_io->rs is not initialized and +may crash when doing memory freeing in verity_fec_finish_io(). + +Crash call stack: + die+0x90/0x2b8 + __do_kernel_fault+0x260/0x298 + do_bad_area+0x2c/0xdc + do_translation_fault+0x3c/0x54 + do_mem_abort+0x54/0x118 + el1_abort+0x38/0x5c + el1h_64_sync_handler+0x50/0x90 + el1h_64_sync+0x64/0x6c + free_rs+0x18/0xac + fec_rs_free+0x10/0x24 + mempool_free+0x58/0x148 + verity_fec_finish_io+0x4c/0xb0 + verity_end_io+0xb8/0x150 + +Cc: stable@vger.kernel.org # v6.0+ +Fixes: 5721d4e5a9cd ("dm verity: Add optional "try_verify_in_tasklet" feature") +Signed-off-by: Wu Bo +Reviewed-by: Mikulas Patocka +Signed-off-by: Mike Snitzer +Signed-off-by: Greg Kroah-Hartman +--- + drivers/md/dm-verity-target.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/md/dm-verity-target.c ++++ b/drivers/md/dm-verity-target.c +@@ -642,7 +642,6 @@ static void verity_work(struct work_stru + + io->in_tasklet = false; + +- verity_fec_init_io(io); + verity_finish_io(io, errno_to_blk_status(verity_verify_io(io))); + } + +@@ -792,6 +791,8 @@ static int verity_map(struct dm_target * + bio->bi_private = io; + io->iter = bio->bi_iter; + ++ verity_fec_init_io(io); ++ + verity_submit_prefetch(v, io); + + submit_bio_noacct(bio); diff --git a/queue-6.6/drm-amd-display-fix-abm-disablement.patch b/queue-6.6/drm-amd-display-fix-abm-disablement.patch new file mode 100644 index 00000000000..cd307416638 --- /dev/null +++ b/queue-6.6/drm-amd-display-fix-abm-disablement.patch @@ -0,0 +1,57 @@ +From b9f46f0b98784e40288ee393f863f553fde062fa Mon Sep 17 00:00:00 2001 +From: Hamza Mahfooz +Date: Wed, 22 Nov 2023 14:50:34 -0500 +Subject: drm/amd/display: fix ABM disablement + +From: Hamza Mahfooz + +commit b9f46f0b98784e40288ee393f863f553fde062fa upstream. + +On recent versions of DMUB firmware, if we want to completely disable +ABM we have to pass ABM_LEVEL_IMMEDIATE_DISABLE as the requested ABM +level to DMUB. Otherwise, LCD eDP displays are unable to reach their +maximum brightness levels. So, to fix this whenever the user requests an +ABM level of 0 pass ABM_LEVEL_IMMEDIATE_DISABLE to DMUB instead. Also, +to keep the user's experience consistent map ABM_LEVEL_IMMEDIATE_DISABLE +to 0 when a user tries to read the requested ABM level. + +Cc: stable@vger.kernel.org # 6.1+ +Reviewed-by: Harry Wentland +Signed-off-by: Hamza Mahfooz +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -6236,7 +6236,7 @@ int amdgpu_dm_connector_atomic_set_prope + dm_new_state->underscan_enable = val; + ret = 0; + } else if (property == adev->mode_info.abm_level_property) { +- dm_new_state->abm_level = val; ++ dm_new_state->abm_level = val ?: ABM_LEVEL_IMMEDIATE_DISABLE; + ret = 0; + } + +@@ -6281,7 +6281,8 @@ int amdgpu_dm_connector_atomic_get_prope + *val = dm_state->underscan_enable; + ret = 0; + } else if (property == adev->mode_info.abm_level_property) { +- *val = dm_state->abm_level; ++ *val = (dm_state->abm_level != ABM_LEVEL_IMMEDIATE_DISABLE) ? ++ dm_state->abm_level : 0; + ret = 0; + } + +@@ -6354,7 +6355,8 @@ void amdgpu_dm_connector_funcs_reset(str + state->pbn = 0; + + if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) +- state->abm_level = amdgpu_dm_abm_level; ++ state->abm_level = amdgpu_dm_abm_level ?: ++ ABM_LEVEL_IMMEDIATE_DISABLE; + + __drm_atomic_helper_connector_reset(connector, &state->base); + } diff --git a/queue-6.6/drm-amd-display-force-toggle-rate-wa-for-first-link-training-for-a-retimer.patch b/queue-6.6/drm-amd-display-force-toggle-rate-wa-for-first-link-training-for-a-retimer.patch new file mode 100644 index 00000000000..f01e61b5a39 --- /dev/null +++ b/queue-6.6/drm-amd-display-force-toggle-rate-wa-for-first-link-training-for-a-retimer.patch @@ -0,0 +1,56 @@ +From eb28018943fed7639dfea1c9ec9c756ec692b99a Mon Sep 17 00:00:00 2001 +From: Zhongwei +Date: Wed, 8 Nov 2023 16:34:36 +0800 +Subject: drm/amd/display: force toggle rate wa for first link training for a retimer + +From: Zhongwei + +commit eb28018943fed7639dfea1c9ec9c756ec692b99a upstream. + +[WHY] +Handover from DMUB to driver does not perform link rate toggle. +It might cause link training failure for boot up. + +[HOW] +Force toggle rate wa for first link train. +link->vendor_specific_lttpr_link_rate_wa should be zero then. + +Cc: stable@vger.kernel.org # 6.1+ +Reviewed-by: Michael Strauss +Acked-by: Hamza Mahfooz +Signed-off-by: Zhongwei +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c ++++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c +@@ -115,7 +115,7 @@ static enum link_training_result perform + lt_settings->cr_pattern_time = 16000; + + /* Fixed VS/PE specific: Toggle link rate */ +- apply_toggle_rate_wa = (link->vendor_specific_lttpr_link_rate_wa == target_rate); ++ apply_toggle_rate_wa = ((link->vendor_specific_lttpr_link_rate_wa == target_rate) || (link->vendor_specific_lttpr_link_rate_wa == 0)); + target_rate = get_dpcd_link_rate(<_settings->link_settings); + toggle_rate = (target_rate == 0x6) ? 0xA : 0x6; + +@@ -271,7 +271,7 @@ enum link_training_result dp_perform_fix + /* Vendor specific: Toggle link rate */ + toggle_rate = (rate == 0x6) ? 0xA : 0x6; + +- if (link->vendor_specific_lttpr_link_rate_wa == rate) { ++ if (link->vendor_specific_lttpr_link_rate_wa == rate || link->vendor_specific_lttpr_link_rate_wa == 0) { + core_link_write_dpcd( + link, + DP_LINK_BW_SET, +@@ -617,7 +617,7 @@ enum link_training_result dp_perform_fix + /* Vendor specific: Toggle link rate */ + toggle_rate = (rate == 0x6) ? 0xA : 0x6; + +- if (link->vendor_specific_lttpr_link_rate_wa == rate) { ++ if (link->vendor_specific_lttpr_link_rate_wa == rate || link->vendor_specific_lttpr_link_rate_wa == 0) { + core_link_write_dpcd( + link, + DP_LINK_BW_SET, diff --git a/queue-6.6/drm-amd-display-include-udelay-when-waiting-for-inbox0-ack.patch b/queue-6.6/drm-amd-display-include-udelay-when-waiting-for-inbox0-ack.patch new file mode 100644 index 00000000000..31cbd91bae2 --- /dev/null +++ b/queue-6.6/drm-amd-display-include-udelay-when-waiting-for-inbox0-ack.patch @@ -0,0 +1,33 @@ +From 3c9ea68cb61bd7e5bd312c06a12adada74ff5805 Mon Sep 17 00:00:00 2001 +From: Alvin Lee +Date: Mon, 6 Nov 2023 11:20:15 -0500 +Subject: drm/amd/display: Include udelay when waiting for INBOX0 ACK + +From: Alvin Lee + +commit 3c9ea68cb61bd7e5bd312c06a12adada74ff5805 upstream. + +When waiting for the ACK for INBOX0 message, +we have to ensure to include the udelay +for proper wait time + +Cc: stable@vger.kernel.org # 6.1+ +Reviewed-by: Samson Tam +Acked-by: Hamza Mahfooz +Signed-off-by: Alvin Lee +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +@@ -997,6 +997,7 @@ enum dmub_status dmub_srv_wait_for_inbox + ack = dmub->hw_funcs.read_inbox0_ack_register(dmub); + if (ack) + return DMUB_STATUS_OK; ++ udelay(1); + } + return DMUB_STATUS_TIMEOUT; + } diff --git a/queue-6.6/drm-amd-display-remove-min_dst_y_next_start-check-for-z8.patch b/queue-6.6/drm-amd-display-remove-min_dst_y_next_start-check-for-z8.patch new file mode 100644 index 00000000000..372928ab05b --- /dev/null +++ b/queue-6.6/drm-amd-display-remove-min_dst_y_next_start-check-for-z8.patch @@ -0,0 +1,70 @@ +From 08448812acb2ab701cd5ff7e1a1dc97f7f10260c Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas +Date: Wed, 8 Nov 2023 10:55:53 -0500 +Subject: drm/amd/display: Remove min_dst_y_next_start check for Z8 + +From: Nicholas Kazlauskas + +commit 08448812acb2ab701cd5ff7e1a1dc97f7f10260c upstream. + +[Why] +Flickering occurs on DRR supported panels when engaged in DRR due to +min_dst_y_next becoming larger than the frame size itself. + +[How] +In general, we should be able to enter Z8 when this is engaged but it +might be a net power loss even if the calculation wasn't bugged. + +Don't support enabling Z8 during the DRR region. + +Cc: stable@vger.kernel.org # 6.1+ +Reviewed-by: Syed Hassan +Acked-by: Hamza Mahfooz +Signed-off-by: Nicholas Kazlauskas +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 15 +-------------- + 1 file changed, 1 insertion(+), 14 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c +@@ -948,10 +948,8 @@ static enum dcn_zstate_support_state de + { + int plane_count; + int i; +- unsigned int min_dst_y_next_start_us; + + plane_count = 0; +- min_dst_y_next_start_us = 0; + for (i = 0; i < dc->res_pool->pipe_count; i++) { + if (context->res_ctx.pipe_ctx[i].plane_state) + plane_count++; +@@ -973,26 +971,15 @@ static enum dcn_zstate_support_state de + else if (context->stream_count == 1 && context->streams[0]->signal == SIGNAL_TYPE_EDP) { + struct dc_link *link = context->streams[0]->sink->link; + struct dc_stream_status *stream_status = &context->stream_status[0]; +- struct dc_stream_state *current_stream = context->streams[0]; + int minmum_z8_residency = dc->debug.minimum_z8_residency_time > 0 ? dc->debug.minimum_z8_residency_time : 1000; + bool allow_z8 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z8_residency; + bool is_pwrseq0 = link->link_index == 0; +- bool isFreesyncVideo; +- +- isFreesyncVideo = current_stream->adjust.v_total_min == current_stream->adjust.v_total_max; +- isFreesyncVideo = isFreesyncVideo && current_stream->timing.v_total < current_stream->adjust.v_total_min; +- for (i = 0; i < dc->res_pool->pipe_count; i++) { +- if (context->res_ctx.pipe_ctx[i].stream == current_stream && isFreesyncVideo) { +- min_dst_y_next_start_us = context->res_ctx.pipe_ctx[i].dlg_regs.min_dst_y_next_start_us; +- break; +- } +- } + + /* Don't support multi-plane configurations */ + if (stream_status->plane_count > 1) + return DCN_ZSTATE_SUPPORT_DISALLOW; + +- if (is_pwrseq0 && (context->bw_ctx.dml.vba.StutterPeriod > 5000.0 || min_dst_y_next_start_us > 5000)) ++ if (is_pwrseq0 && context->bw_ctx.dml.vba.StutterPeriod > 5000.0) + return DCN_ZSTATE_SUPPORT_ALLOW; + else if (is_pwrseq0 && link->psr_settings.psr_version == DC_PSR_VERSION_1 && !link->panel_config.psr.disable_psr) + return allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY : DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY; diff --git a/queue-6.6/drm-amd-display-update-min-z8-residency-time-to-2100-for-dcn314.patch b/queue-6.6/drm-amd-display-update-min-z8-residency-time-to-2100-for-dcn314.patch new file mode 100644 index 00000000000..f48e9a3b58a --- /dev/null +++ b/queue-6.6/drm-amd-display-update-min-z8-residency-time-to-2100-for-dcn314.patch @@ -0,0 +1,37 @@ +From 4636a211980052ca0df90265c8a3ed2d46099091 Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas +Date: Wed, 8 Nov 2023 10:59:00 -0500 +Subject: drm/amd/display: Update min Z8 residency time to 2100 for DCN314 + +From: Nicholas Kazlauskas + +commit 4636a211980052ca0df90265c8a3ed2d46099091 upstream. + +[Why] +Some panels with residency period of 2054 exhibit flickering with +Z8 at the end of the frame. + +[How] +As a workaround, increase the limit to block these panels. + +Cc: stable@vger.kernel.org # 6.1+ +Reviewed-by: Syed Hassan +Acked-by: Hamza Mahfooz +Signed-off-by: Nicholas Kazlauskas +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +@@ -869,7 +869,7 @@ static const struct dc_plane_cap plane_c + static const struct dc_debug_options debug_defaults_drv = { + .disable_z10 = false, + .enable_z9_disable_interface = true, +- .minimum_z8_residency_time = 2000, ++ .minimum_z8_residency_time = 2100, + .psr_skip_crtc_disable = true, + .replay_skip_crtc_disabled = true, + .disable_dmcu = true, diff --git a/queue-6.6/drm-amd-display-use-dram-speed-from-validation-for-dummy-p-state.patch b/queue-6.6/drm-amd-display-use-dram-speed-from-validation-for-dummy-p-state.patch new file mode 100644 index 00000000000..eed68da786b --- /dev/null +++ b/queue-6.6/drm-amd-display-use-dram-speed-from-validation-for-dummy-p-state.patch @@ -0,0 +1,44 @@ +From 9be601135ba8ac69880c01606c82140f2dde105e Mon Sep 17 00:00:00 2001 +From: Alvin Lee +Date: Tue, 7 Nov 2023 17:01:49 -0500 +Subject: drm/amd/display: Use DRAM speed from validation for dummy p-state + +From: Alvin Lee + +commit 9be601135ba8ac69880c01606c82140f2dde105e upstream. + +[Description] +When choosing which dummy p-state latency to use, we +need to use the DRAM speed from validation. The DRAMSpeed +DML variable can change because we use different input +params to DML when populating watermarks set B. + +Cc: stable@vger.kernel.org # 6.1+ +Reviewed-by: Samson Tam +Acked-by: Hamza Mahfooz +Signed-off-by: Alvin Lee +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +@@ -1964,6 +1964,7 @@ void dcn32_calculate_wm_and_dlg_fpu(stru + int i, pipe_idx, vlevel_temp = 0; + double dcfclk = dcn3_2_soc.clock_limits[0].dcfclk_mhz; + double dcfclk_from_validation = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; ++ double dram_speed_from_validation = context->bw_ctx.dml.vba.DRAMSpeed; + double dcfclk_from_fw_based_mclk_switching = dcfclk_from_validation; + bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] != + dm_dram_clock_change_unsupported; +@@ -2151,7 +2152,7 @@ void dcn32_calculate_wm_and_dlg_fpu(stru + } + + if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { +- min_dram_speed_mts = context->bw_ctx.dml.vba.DRAMSpeed; ++ min_dram_speed_mts = dram_speed_from_validation; + min_dram_speed_mts_margin = 160; + + context->bw_ctx.dml.soc.dram_clock_change_latency_us = diff --git a/queue-6.6/drm-amd-enable-pcie-pme-from-d3.patch b/queue-6.6/drm-amd-enable-pcie-pme-from-d3.patch new file mode 100644 index 00000000000..829a61143d0 --- /dev/null +++ b/queue-6.6/drm-amd-enable-pcie-pme-from-d3.patch @@ -0,0 +1,36 @@ +From 6967741d26c87300a51b5e50d4acd104bc1a9759 Mon Sep 17 00:00:00 2001 +From: Mario Limonciello +Date: Fri, 24 Nov 2023 09:56:32 -0600 +Subject: drm/amd: Enable PCIe PME from D3 + +From: Mario Limonciello + +commit 6967741d26c87300a51b5e50d4acd104bc1a9759 upstream. + +When dGPU is put into BOCO it may be in D3cold but still able send +PME on display hotplug event. For this to work it must be enabled +as wake source from D3. + +When runpm is enabled use pci_wake_from_d3() to mark wakeup as +enabled by default. + +Cc: stable@vger.kernel.org # 6.1+ +Signed-off-by: Mario Limonciello +Acked-by: Alex Deucher +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +@@ -2195,6 +2195,8 @@ retry_init: + pm_runtime_mark_last_busy(ddev->dev); + pm_runtime_put_autosuspend(ddev->dev); + ++ pci_wake_from_d3(pdev, TRUE); ++ + /* + * For runpm implemented via BACO, PMFW will handle the + * timing for BACO in and out: diff --git a/queue-6.6/drm-amdgpu-correct-the-amdgpu-runtime-dereference-usage-count.patch b/queue-6.6/drm-amdgpu-correct-the-amdgpu-runtime-dereference-usage-count.patch new file mode 100644 index 00000000000..efa5846a336 --- /dev/null +++ b/queue-6.6/drm-amdgpu-correct-the-amdgpu-runtime-dereference-usage-count.patch @@ -0,0 +1,40 @@ +From c6df7f313794c3ad41a49b9a7c95da369db607f3 Mon Sep 17 00:00:00 2001 +From: Prike Liang +Date: Wed, 8 Nov 2023 14:38:29 +0800 +Subject: drm/amdgpu: correct the amdgpu runtime dereference usage count + +From: Prike Liang + +commit c6df7f313794c3ad41a49b9a7c95da369db607f3 upstream. + +Fix the amdgpu runpm dereference usage count. + +Signed-off-by: Prike Liang +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +@@ -340,14 +340,11 @@ int amdgpu_display_crtc_set_config(struc + adev->have_disp_power_ref = true; + return ret; + } +- /* if we have no active crtcs, then drop the power ref +- * we got before ++ /* if we have no active crtcs, then go to ++ * drop the power ref we got before + */ +- if (!active && adev->have_disp_power_ref) { +- pm_runtime_put_autosuspend(dev->dev); ++ if (!active && adev->have_disp_power_ref) + adev->have_disp_power_ref = false; +- } +- + out: + /* drop the power reference we got coming in here */ + pm_runtime_put_autosuspend(dev->dev); diff --git a/queue-6.6/drm-amdgpu-fix-memory-overflow-in-the-ib-test.patch b/queue-6.6/drm-amdgpu-fix-memory-overflow-in-the-ib-test.patch new file mode 100644 index 00000000000..aa55d5226af --- /dev/null +++ b/queue-6.6/drm-amdgpu-fix-memory-overflow-in-the-ib-test.patch @@ -0,0 +1,81 @@ +From 6b0b7789a7a5f3e69185449f891beea58e563f9b Mon Sep 17 00:00:00 2001 +From: Tim Huang +Date: Tue, 21 Nov 2023 11:06:51 +0800 +Subject: drm/amdgpu: fix memory overflow in the IB test +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Tim Huang + +commit 6b0b7789a7a5f3e69185449f891beea58e563f9b upstream. + +Fix a memory overflow issue in the gfx IB test +for some ASICs. At least 20 bytes are needed for +the IB test packet. + +v2: correct code indentation errors. (Christian) + +Signed-off-by: Tim Huang +Reviewed-by: Yifan Zhang +Reviewed-by: Christian König +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 4 ++-- + 4 files changed, 7 insertions(+), 7 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +@@ -398,7 +398,7 @@ static int gfx_v11_0_ring_test_ib(struct + adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); + cpu_ptr = &adev->wb.wb[index]; + +- r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &ib); ++ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib); + if (r) { + DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r); + goto err1; +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -883,8 +883,8 @@ static int gfx_v8_0_ring_test_ib(struct + gpu_addr = adev->wb.gpu_addr + (index * 4); + adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); + memset(&ib, 0, sizeof(ib)); +- r = amdgpu_ib_get(adev, NULL, 16, +- AMDGPU_IB_POOL_DIRECT, &ib); ++ ++ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib); + if (r) + goto err1; + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -1039,8 +1039,8 @@ static int gfx_v9_0_ring_test_ib(struct + gpu_addr = adev->wb.gpu_addr + (index * 4); + adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); + memset(&ib, 0, sizeof(ib)); +- r = amdgpu_ib_get(adev, NULL, 16, +- AMDGPU_IB_POOL_DIRECT, &ib); ++ ++ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib); + if (r) + goto err1; + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +@@ -296,8 +296,8 @@ static int gfx_v9_4_3_ring_test_ib(struc + gpu_addr = adev->wb.gpu_addr + (index * 4); + adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); + memset(&ib, 0, sizeof(ib)); +- r = amdgpu_ib_get(adev, NULL, 16, +- AMDGPU_IB_POOL_DIRECT, &ib); ++ ++ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib); + if (r) + goto err1; + diff --git a/queue-6.6/drm-amdgpu-force-order-between-a-read-and-write-to-the-same-address.patch b/queue-6.6/drm-amdgpu-force-order-between-a-read-and-write-to-the-same-address.patch new file mode 100644 index 00000000000..7403766e4e9 --- /dev/null +++ b/queue-6.6/drm-amdgpu-force-order-between-a-read-and-write-to-the-same-address.patch @@ -0,0 +1,58 @@ +From 4b27a33c3b173bef1d19ba89e0b9b812b4fddd25 Mon Sep 17 00:00:00 2001 +From: Alex Sierra +Date: Mon, 20 Nov 2023 11:31:32 -0600 +Subject: drm/amdgpu: Force order between a read and write to the same address + +From: Alex Sierra + +commit 4b27a33c3b173bef1d19ba89e0b9b812b4fddd25 upstream. + +Setting register to force ordering to prevent read/write or write/read +hazards for un-cached modes. + +Signed-off-by: Alex Sierra +Acked-by: Alex Deucher +Reviewed-by: Felix Kuehling +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.1.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8 ++++++++ + drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h | 2 ++ + 2 files changed, 10 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +@@ -83,6 +83,10 @@ MODULE_FIRMWARE("amdgpu/gc_11_0_4_me.bin + MODULE_FIRMWARE("amdgpu/gc_11_0_4_mec.bin"); + MODULE_FIRMWARE("amdgpu/gc_11_0_4_rlc.bin"); + ++static const struct soc15_reg_golden golden_settings_gc_11_0[] = { ++ SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL, 0x20000000, 0x20000000) ++}; ++ + static const struct soc15_reg_golden golden_settings_gc_11_0_1[] = + { + SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_GS_NGG_CLK_CTRL, 0x9fff8fff, 0x00000010), +@@ -275,6 +279,10 @@ static void gfx_v11_0_init_golden_regist + default: + break; + } ++ soc15_program_register_sequence(adev, ++ golden_settings_gc_11_0, ++ (const u32)ARRAY_SIZE(golden_settings_gc_11_0)); ++ + } + + static void gfx_v11_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, +--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h ++++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h +@@ -6369,6 +6369,8 @@ + #define regTCP_INVALIDATE_BASE_IDX 1 + #define regTCP_STATUS 0x19a1 + #define regTCP_STATUS_BASE_IDX 1 ++#define regTCP_CNTL 0x19a2 ++#define regTCP_CNTL_BASE_IDX 1 + #define regTCP_CNTL2 0x19a3 + #define regTCP_CNTL2_BASE_IDX 1 + #define regTCP_DEBUG_INDEX 0x19a5 diff --git a/queue-6.6/drm-amdgpu-update-eeprom-i2c-address-for-smu-v13_0_0.patch b/queue-6.6/drm-amdgpu-update-eeprom-i2c-address-for-smu-v13_0_0.patch new file mode 100644 index 00000000000..8b31206b48c --- /dev/null +++ b/queue-6.6/drm-amdgpu-update-eeprom-i2c-address-for-smu-v13_0_0.patch @@ -0,0 +1,35 @@ +From e0409021e34af50e7b6f31635c8d21583d7c43dd Mon Sep 17 00:00:00 2001 +From: Candice Li +Date: Fri, 24 Nov 2023 09:33:47 +0800 +Subject: drm/amdgpu: Update EEPROM I2C address for smu v13_0_0 + +From: Candice Li + +commit e0409021e34af50e7b6f31635c8d21583d7c43dd upstream. + +Check smu v13_0_0 SKU type to select EEPROM I2C address. + +Signed-off-by: Candice Li +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.1.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c +@@ -214,6 +214,12 @@ static bool __get_eeprom_i2c_addr(struct + control->i2c_address = EEPROM_I2C_MADDR_0; + return true; + case IP_VERSION(13, 0, 0): ++ if (strnstr(atom_ctx->vbios_pn, "D707", ++ sizeof(atom_ctx->vbios_pn))) ++ control->i2c_address = EEPROM_I2C_MADDR_0; ++ else ++ control->i2c_address = EEPROM_I2C_MADDR_4; ++ return true; + case IP_VERSION(13, 0, 6): + case IP_VERSION(13, 0, 10): + control->i2c_address = EEPROM_I2C_MADDR_4; diff --git a/queue-6.6/nvme-check-for-valid-nvme_identify_ns-before-using-it.patch b/queue-6.6/nvme-check-for-valid-nvme_identify_ns-before-using-it.patch new file mode 100644 index 00000000000..dd8fffec922 --- /dev/null +++ b/queue-6.6/nvme-check-for-valid-nvme_identify_ns-before-using-it.patch @@ -0,0 +1,75 @@ +From d8b90d600aff181936457f032d116dbd8534db06 Mon Sep 17 00:00:00 2001 +From: "Ewan D. Milne" +Date: Mon, 27 Nov 2023 15:56:57 -0500 +Subject: nvme: check for valid nvme_identify_ns() before using it + +From: Ewan D. Milne + +commit d8b90d600aff181936457f032d116dbd8534db06 upstream. + +When scanning namespaces, it is possible to get valid data from the first +call to nvme_identify_ns() in nvme_alloc_ns(), but not from the second +call in nvme_update_ns_info_block(). In particular, if the NSID becomes +inactive between the two commands, a storage device may return a buffer +filled with zero as per 4.1.5.1. In this case, we can get a kernel crash +due to a divide-by-zero in blk_stack_limits() because ns->lba_shift will +be set to zero. + +PID: 326 TASK: ffff95fec3cd8000 CPU: 29 COMMAND: "kworker/u98:10" + #0 [ffffad8f8702f9e0] machine_kexec at ffffffff91c76ec7 + #1 [ffffad8f8702fa38] __crash_kexec at ffffffff91dea4fa + #2 [ffffad8f8702faf8] crash_kexec at ffffffff91deb788 + #3 [ffffad8f8702fb00] oops_end at ffffffff91c2e4bb + #4 [ffffad8f8702fb20] do_trap at ffffffff91c2a4ce + #5 [ffffad8f8702fb70] do_error_trap at ffffffff91c2a595 + #6 [ffffad8f8702fbb0] exc_divide_error at ffffffff928506e6 + #7 [ffffad8f8702fbd0] asm_exc_divide_error at ffffffff92a00926 + [exception RIP: blk_stack_limits+434] + RIP: ffffffff92191872 RSP: ffffad8f8702fc80 RFLAGS: 00010246 + RAX: 0000000000000000 RBX: ffff95efa0c91800 RCX: 0000000000000001 + RDX: 0000000000000000 RSI: 0000000000000001 RDI: 0000000000000001 + RBP: 00000000ffffffff R8: ffff95fec7df35a8 R9: 0000000000000000 + R10: 0000000000000000 R11: 0000000000000001 R12: 0000000000000000 + R13: 0000000000000000 R14: 0000000000000000 R15: ffff95fed33c09a8 + ORIG_RAX: ffffffffffffffff CS: 0010 SS: 0018 + #8 [ffffad8f8702fce0] nvme_update_ns_info_block at ffffffffc06d3533 [nvme_core] + #9 [ffffad8f8702fd18] nvme_scan_ns at ffffffffc06d6fa7 [nvme_core] + +This happened when the check for valid data was moved out of nvme_identify_ns() +into one of the callers. Fix this by checking in both callers. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=218186 +Fixes: 0dd6fff2aad4 ("nvme: bring back auto-removal of deleted namespaces during sequential scan") +Cc: stable@vger.kernel.org +Signed-off-by: Ewan D. Milne +Signed-off-by: Keith Busch +Signed-off-by: Greg Kroah-Hartman +--- + drivers/nvme/host/core.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/nvme/host/core.c ++++ b/drivers/nvme/host/core.c +@@ -2026,6 +2026,13 @@ static int nvme_update_ns_info_block(str + if (ret) + return ret; + ++ if (id->ncap == 0) { ++ /* namespace not allocated or attached */ ++ info->is_removed = true; ++ ret = -ENODEV; ++ goto error; ++ } ++ + blk_mq_freeze_queue(ns->disk->queue); + lbaf = nvme_lbaf_index(id->flbas); + ns->lba_shift = id->lbaf[lbaf].ds; +@@ -2083,6 +2090,8 @@ out: + set_bit(NVME_NS_READY, &ns->flags); + ret = 0; + } ++ ++error: + kfree(id); + return ret; + } diff --git a/queue-6.6/scsi-change-scsi-device-boolean-fields-to-single-bit-flags.patch b/queue-6.6/scsi-change-scsi-device-boolean-fields-to-single-bit-flags.patch new file mode 100644 index 00000000000..373096138da --- /dev/null +++ b/queue-6.6/scsi-change-scsi-device-boolean-fields-to-single-bit-flags.patch @@ -0,0 +1,89 @@ +From 6371be7aeb986905bb60ec73d002fc02343393b4 Mon Sep 17 00:00:00 2001 +From: Damien Le Moal +Date: Tue, 21 Nov 2023 07:56:30 +0900 +Subject: scsi: Change SCSI device boolean fields to single bit flags + +From: Damien Le Moal + +commit 6371be7aeb986905bb60ec73d002fc02343393b4 upstream. + +Commit 3cc2ffe5c16d ("scsi: sd: Differentiate system and runtime start/stop +management") changed the single bit manage_start_stop flag into 2 boolean +fields of the SCSI device structure. Commit 24eca2dce0f8 ("scsi: sd: +Introduce manage_shutdown device flag") introduced the manage_shutdown +boolean field for the same structure. Together, these 2 commits increase +the size of struct scsi_device by 8 bytes by using booleans instead of +defining the manage_xxx fields as single bit flags, similarly to other +flags of this structure. + +Avoid this unnecessary structure size increase and be consistent with the +definition of other flags by reverting the definitions of the manage_xxx +fields as single bit flags. + +Fixes: 3cc2ffe5c16d ("scsi: sd: Differentiate system and runtime start/stop management") +Fixes: 24eca2dce0f8 ("scsi: sd: Introduce manage_shutdown device flag") +Cc: +Signed-off-by: Damien Le Moal +Link: https://lore.kernel.org/r/20231120225631.37938-2-dlemoal@kernel.org +Reviewed-by: Niklas Cassel +Signed-off-by: Martin K. Petersen +Signed-off-by: Greg Kroah-Hartman +--- + drivers/ata/libata-scsi.c | 4 ++-- + drivers/firewire/sbp2.c | 6 +++--- + include/scsi/scsi_device.h | 6 +++--- + 3 files changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/ata/libata-scsi.c ++++ b/drivers/ata/libata-scsi.c +@@ -1056,8 +1056,8 @@ int ata_scsi_dev_config(struct scsi_devi + * and resume and shutdown only. For system level suspend/resume, + * devices power state is handled directly by libata EH. + */ +- sdev->manage_runtime_start_stop = true; +- sdev->manage_shutdown = true; ++ sdev->manage_runtime_start_stop = 1; ++ sdev->manage_shutdown = 1; + } + + /* +--- a/drivers/firewire/sbp2.c ++++ b/drivers/firewire/sbp2.c +@@ -1519,9 +1519,9 @@ static int sbp2_scsi_slave_configure(str + sdev->use_10_for_rw = 1; + + if (sbp2_param_exclusive_login) { +- sdev->manage_system_start_stop = true; +- sdev->manage_runtime_start_stop = true; +- sdev->manage_shutdown = true; ++ sdev->manage_system_start_stop = 1; ++ sdev->manage_runtime_start_stop = 1; ++ sdev->manage_shutdown = 1; + } + + if (sdev->type == TYPE_ROM) +--- a/include/scsi/scsi_device.h ++++ b/include/scsi/scsi_device.h +@@ -167,19 +167,19 @@ struct scsi_device { + * power state for system suspend/resume (suspend to RAM and + * hibernation) operations. + */ +- bool manage_system_start_stop; ++ unsigned manage_system_start_stop:1; + + /* + * If true, let the high-level device driver (sd) manage the device + * power state for runtime device suspand and resume operations. + */ +- bool manage_runtime_start_stop; ++ unsigned manage_runtime_start_stop:1; + + /* + * If true, let the high-level device driver (sd) manage the device + * power state for system shutdown (power off) operations. + */ +- bool manage_shutdown; ++ unsigned manage_shutdown:1; + + unsigned removable:1; + unsigned changed:1; /* Data invalid due to media change */ diff --git a/queue-6.6/scsi-sd-fix-system-start-for-ata-devices.patch b/queue-6.6/scsi-sd-fix-system-start-for-ata-devices.patch new file mode 100644 index 00000000000..5e6a1916983 --- /dev/null +++ b/queue-6.6/scsi-sd-fix-system-start-for-ata-devices.patch @@ -0,0 +1,87 @@ +From b09d7f8fd50f6e93cbadd8d27fde178f745b42a1 Mon Sep 17 00:00:00 2001 +From: Damien Le Moal +Date: Tue, 21 Nov 2023 07:56:31 +0900 +Subject: scsi: sd: Fix system start for ATA devices + +From: Damien Le Moal + +commit b09d7f8fd50f6e93cbadd8d27fde178f745b42a1 upstream. + +It is not always possible to keep a device in the runtime suspended state +when a system level suspend/resume cycle is executed. E.g. for ATA devices +connected to AHCI adapters, system resume resets the ATA ports, which +causes connected devices to spin up. In such case, a runtime suspended disk +will incorrectly be seen with a suspended runtime state because the device +is not resumed by sd_resume_system(). The power state seen by the user is +different than the actual device physical power state. + +Fix this issue by introducing the struct scsi_device flag +force_runtime_start_on_system_start. When set, this flag causes +sd_resume_system() to request a runtime resume operation for runtime +suspended devices. This results in the user seeing the device runtime_state +as active after a system resume, thus correctly reflecting the device +physical power state. + +Fixes: 9131bff6a9f1 ("scsi: core: pm: Only runtime resume if necessary") +Cc: +Signed-off-by: Damien Le Moal +Link: https://lore.kernel.org/r/20231120225631.37938-3-dlemoal@kernel.org +Signed-off-by: Martin K. Petersen +Signed-off-by: Greg Kroah-Hartman +--- + drivers/ata/libata-scsi.c | 5 +++++ + drivers/scsi/sd.c | 9 ++++++++- + include/scsi/scsi_device.h | 6 ++++++ + 3 files changed, 19 insertions(+), 1 deletion(-) + +--- a/drivers/ata/libata-scsi.c ++++ b/drivers/ata/libata-scsi.c +@@ -1055,9 +1055,14 @@ int ata_scsi_dev_config(struct scsi_devi + * Ask the sd driver to issue START STOP UNIT on runtime suspend + * and resume and shutdown only. For system level suspend/resume, + * devices power state is handled directly by libata EH. ++ * Given that disks are always spun up on system resume, also ++ * make sure that the sd driver forces runtime suspended disks ++ * to be resumed to correctly reflect the power state of the ++ * device. + */ + sdev->manage_runtime_start_stop = 1; + sdev->manage_shutdown = 1; ++ sdev->force_runtime_start_on_system_start = 1; + } + + /* +--- a/drivers/scsi/sd.c ++++ b/drivers/scsi/sd.c +@@ -3953,8 +3953,15 @@ static int sd_resume(struct device *dev, + + static int sd_resume_system(struct device *dev) + { +- if (pm_runtime_suspended(dev)) ++ if (pm_runtime_suspended(dev)) { ++ struct scsi_disk *sdkp = dev_get_drvdata(dev); ++ struct scsi_device *sdp = sdkp ? sdkp->device : NULL; ++ ++ if (sdp && sdp->force_runtime_start_on_system_start) ++ pm_request_resume(dev); ++ + return 0; ++ } + + return sd_resume(dev, false); + } +--- a/include/scsi/scsi_device.h ++++ b/include/scsi/scsi_device.h +@@ -181,6 +181,12 @@ struct scsi_device { + */ + unsigned manage_shutdown:1; + ++ /* ++ * If set and if the device is runtime suspended, ask the high-level ++ * device driver (sd) to force a runtime resume of the device. ++ */ ++ unsigned force_runtime_start_on_system_start:1; ++ + unsigned removable:1; + unsigned changed:1; /* Data invalid due to media change */ + unsigned busy:1; /* Used to prevent races */ diff --git a/queue-6.6/scsi-ufs-core-clear-cmd-if-abort-succeeds-in-mcq-mode.patch b/queue-6.6/scsi-ufs-core-clear-cmd-if-abort-succeeds-in-mcq-mode.patch new file mode 100644 index 00000000000..3684dee4233 --- /dev/null +++ b/queue-6.6/scsi-ufs-core-clear-cmd-if-abort-succeeds-in-mcq-mode.patch @@ -0,0 +1,58 @@ +From 93e6c0e19d5bb12b49534a411c85e21d333731fa Mon Sep 17 00:00:00 2001 +From: Peter Wang +Date: Wed, 15 Nov 2023 21:10:24 +0800 +Subject: scsi: ufs: core: Clear cmd if abort succeeds in MCQ mode + +From: Peter Wang + +commit 93e6c0e19d5bb12b49534a411c85e21d333731fa upstream. + +In MCQ mode, if cmd is pending in device and abort succeeds, response will +not be returned by device. So we need clear the cmd, otherwise timeout will +happen and next time we use same tag we will get a WARN_ON(lrbp->cmd). + +Below is error log: + + <3>[ 2277.447611][T21376] ufshcd-mtk 112b0000.ufshci: ufshcd_try_to_abort_task: cmd pending in the device. tag = 7 + <3>[ 2277.476954][T21376] ufshcd-mtk 112b0000.ufshci: Aborting tag 7 / CDB 0x2a succeeded + <6>[ 2307.551263][T30974] ufshcd-mtk 112b0000.ufshci: ufshcd_abort: Device abort task at tag 7 + <4>[ 2307.623264][ T327] WARNING: CPU: 5 PID: 327 at source/drivers/ufs/core/ufshcd.c:3021 ufshcd_queuecommand+0x66c/0xe34 + +Fixes: ab248643d3d6 ("scsi: ufs: core: Add error handling for MCQ mode") +Cc: +Signed-off-by: Peter Wang +Link: https://lore.kernel.org/r/20231115131024.15829-1-peter.wang@mediatek.com +Reviewed-by: Bart Van Assche +Signed-off-by: Martin K. Petersen +Signed-off-by: Greg Kroah-Hartman +--- + drivers/ufs/core/ufshcd.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/ufs/core/ufshcd.c ++++ b/drivers/ufs/core/ufshcd.c +@@ -6347,11 +6347,24 @@ static bool ufshcd_abort_one(struct requ + struct scsi_device *sdev = cmd->device; + struct Scsi_Host *shost = sdev->host; + struct ufs_hba *hba = shost_priv(shost); ++ struct ufshcd_lrb *lrbp = &hba->lrb[tag]; ++ struct ufs_hw_queue *hwq; ++ unsigned long flags; + + *ret = ufshcd_try_to_abort_task(hba, tag); + dev_err(hba->dev, "Aborting tag %d / CDB %#02x %s\n", tag, + hba->lrb[tag].cmd ? hba->lrb[tag].cmd->cmnd[0] : -1, + *ret ? "failed" : "succeeded"); ++ ++ /* Release cmd in MCQ mode if abort succeeds */ ++ if (is_mcq_enabled(hba) && (*ret == 0)) { ++ hwq = ufshcd_mcq_req_to_hwq(hba, scsi_cmd_to_rq(lrbp->cmd)); ++ spin_lock_irqsave(&hwq->cq_lock, flags); ++ if (ufshcd_cmd_inflight(lrbp->cmd)) ++ ufshcd_release_scsi_cmd(hba, lrbp); ++ spin_unlock_irqrestore(&hwq->cq_lock, flags); ++ } ++ + return *ret == 0; + } + diff --git a/queue-6.6/series b/queue-6.6/series index ce73e4c3796..fd395da4d8c 100644 --- a/queue-6.6/series +++ b/queue-6.6/series @@ -20,3 +20,20 @@ alsa-hda-realtek-headset-mic-vref-to-100.patch alsa-hda-realtek-add-supported-alc257-for-chromeos.patch net-libwx-fix-memory-leak-on-msix-entry.patch dm-verity-align-struct-dm_verity_fec_io-properly.patch +scsi-change-scsi-device-boolean-fields-to-single-bit-flags.patch +scsi-sd-fix-system-start-for-ata-devices.patch +scsi-ufs-core-clear-cmd-if-abort-succeeds-in-mcq-mode.patch +drm-amd-enable-pcie-pme-from-d3.patch +drm-amdgpu-correct-the-amdgpu-runtime-dereference-usage-count.patch +drm-amdgpu-force-order-between-a-read-and-write-to-the-same-address.patch +drm-amdgpu-fix-memory-overflow-in-the-ib-test.patch +drm-amdgpu-update-eeprom-i2c-address-for-smu-v13_0_0.patch +drm-amd-display-include-udelay-when-waiting-for-inbox0-ack.patch +drm-amd-display-remove-min_dst_y_next_start-check-for-z8.patch +drm-amd-display-use-dram-speed-from-validation-for-dummy-p-state.patch +drm-amd-display-update-min-z8-residency-time-to-2100-for-dcn314.patch +drm-amd-display-fix-abm-disablement.patch +drm-amd-display-force-toggle-rate-wa-for-first-link-training-for-a-retimer.patch +dm-verity-initialize-fec-io-before-freeing-it.patch +dm-verity-don-t-perform-fec-for-failed-readahead-io.patch +nvme-check-for-valid-nvme_identify_ns-before-using-it.patch -- 2.47.3