From b72cb7bcc20c3a0d7fc29590a6e85de3dfbe9eff Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Thu, 22 Jan 2026 16:28:37 -0600 Subject: [PATCH] gpu: nova-core: add ImemNonSecure section infrastructure The GSP booter firmware in Turing and GA100 includes a third memory section called ImemNonSecure, which is non-secure IMEM. This section must be loaded separately from DMEM and secure IMEM, but only if it actually exists. Signed-off-by: Timur Tabi Reviewed-by: John Hubbard Reviewed-by: Gary Guo Acked-by: Danilo Krummrich Link: https://patch.msgid.link/20260122222848.2555890-3-ttabi@nvidia.com [acourbot@nvidia.com: add `debug_assert`.] Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/falcon.rs | 20 ++++++++++++++++++-- drivers/gpu/nova-core/firmware/booter.rs | 9 +++++++++ drivers/gpu/nova-core/firmware/fwsec.rs | 5 +++++ 3 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index 310d4e75bad3..1d902ec62a6e 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -242,6 +242,9 @@ impl From for bool { pub(crate) enum FalconMem { /// Secure Instruction Memory. ImemSecure, + /// Non-Secure Instruction Memory. + #[expect(unused)] + ImemNonSecure, /// Data Memory. Dmem, } @@ -351,6 +354,10 @@ pub(crate) trait FalconLoadParams { /// Returns the load parameters for Secure `IMEM`. fn imem_sec_load_params(&self) -> FalconLoadTarget; + /// Returns the load parameters for Non-Secure `IMEM`, + /// used only on Turing and GA100. + fn imem_ns_load_params(&self) -> Option; + /// Returns the load parameters for `DMEM`. fn dmem_load_params(&self) -> FalconLoadTarget; @@ -460,7 +467,9 @@ impl Falcon { // // For DMEM we can fold the start offset into the DMA handle. let (src_start, dma_start) = match target_mem { - FalconMem::ImemSecure => (load_offsets.src_start, fw.dma_handle()), + FalconMem::ImemSecure | FalconMem::ImemNonSecure => { + (load_offsets.src_start, fw.dma_handle()) + } FalconMem::Dmem => ( 0, fw.dma_handle_with_offset(load_offsets.src_start.into_safe_cast())?, @@ -517,7 +526,7 @@ impl Falcon { let cmd = regs::NV_PFALCON_FALCON_DMATRFCMD::default() .set_size(DmaTrfCmdSize::Size256B) - .set_imem(target_mem == FalconMem::ImemSecure) + .set_imem(target_mem != FalconMem::Dmem) .set_sec(if sec { 1 } else { 0 }); for pos in (0..num_transfers).map(|i| i * DMA_LEN) { @@ -546,6 +555,13 @@ impl Falcon { /// Perform a DMA load into `IMEM` and `DMEM` of `fw`, and prepare the falcon to run it. pub(crate) fn dma_load>(&self, bar: &Bar0, fw: &F) -> Result { + // The Non-Secure section only exists on firmware used by Turing and GA100, and + // those platforms do not use DMA. + if fw.imem_ns_load_params().is_some() { + debug_assert!(false); + return Err(EINVAL); + } + self.dma_reset(bar); regs::NV_PFALCON_FBIF_TRANSCFG::update(bar, &E::ID, 0, |v| { v.set_target(FalconFbifTarget::CoherentSysmem) diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-core/firmware/booter.rs index 096cd01dbc9d..1b98bb47424c 100644 --- a/drivers/gpu/nova-core/firmware/booter.rs +++ b/drivers/gpu/nova-core/firmware/booter.rs @@ -253,6 +253,9 @@ impl<'a> FirmwareSignature for BooterSignature<'a> {} pub(crate) struct BooterFirmware { // Load parameters for Secure `IMEM` falcon memory. imem_sec_load_target: FalconLoadTarget, + // Load parameters for Non-Secure `IMEM` falcon memory, + // used only on Turing and GA100 + imem_ns_load_target: Option, // Load parameters for `DMEM` falcon memory. dmem_load_target: FalconLoadTarget, // BROM falcon parameters. @@ -359,6 +362,8 @@ impl BooterFirmware { dst_start: 0, len: app0.len, }, + // Exists only in the booter image for Turing and GA100 + imem_ns_load_target: None, dmem_load_target: FalconLoadTarget { src_start: load_hdr.os_data_offset, dst_start: 0, @@ -375,6 +380,10 @@ impl FalconLoadParams for BooterFirmware { self.imem_sec_load_target.clone() } + fn imem_ns_load_params(&self) -> Option { + self.imem_ns_load_target.clone() + } + fn dmem_load_params(&self) -> FalconLoadTarget { self.dmem_load_target.clone() } diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs index 6a2f5a0d4b15..e4009faba6c5 100644 --- a/drivers/gpu/nova-core/firmware/fwsec.rs +++ b/drivers/gpu/nova-core/firmware/fwsec.rs @@ -232,6 +232,11 @@ impl FalconLoadParams for FwsecFirmware { } } + fn imem_ns_load_params(&self) -> Option { + // Only used on Turing and GA100, so return None for now + None + } + fn dmem_load_params(&self) -> FalconLoadTarget { FalconLoadTarget { src_start: self.desc.imem_load_size, -- 2.47.3