From b9d6a4f9f2fece46e233efc9ab87c2016ea8d3b0 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 30 Apr 2013 07:30:20 +0200 Subject: [PATCH] backport: re PR target/44578 (GCC generates MMX instructions but fails to generate "emms") Backport from mainline 2013-04-29 Uros Bizjak PR target/44578 * config/i386/i386.md (*zero_extendsidi2_rex64): Add "!" to m->?*y alternative. (*zero_extendsidi2): Ditto. Backport from mainline 2013-04-29 Uros Bizjak PR target/57098 * config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory. testsuite/ChangeLog: Backport from mainline 2013-04-29 Uros Bizjak PR target/44578 * gcc.target/i386/pr44578.c: New test. Backport from mainline 2013-04-29 Uros Bizjak PR target/57098 * gcc.target/i386/pr57098.c: New test. From-SVN: r198439 --- gcc/ChangeLog | 16 +++++++++++++ gcc/config/i386/i386.c | 6 ++--- gcc/config/i386/i386.md | 8 +++---- gcc/testsuite/ChangeLog | 14 +++++++++++ gcc/testsuite/gcc.target/i386/pr44578.c | 31 +++++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr57098.c | 10 ++++++++ 6 files changed, 78 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr44578.c create mode 100644 gcc/testsuite/gcc.target/i386/pr57098.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d2214c0dae60..56866314113f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2013-04-30 Uros Bizjak + + Backport from mainline + 2013-04-29 Uros Bizjak + + PR target/44578 + * config/i386/i386.md (*zero_extendsidi2_rex64): Add "!" to m->?*y + alternative. + (*zero_extendsidi2): Ditto. + + Backport from mainline + 2013-04-29 Uros Bizjak + + PR target/57098 + * config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory. + 2013-04-29 Christian Bruel PR target/57108 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 440bd82dd0e0..cd117d40da03 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -20026,7 +20026,7 @@ ix86_expand_vec_perm (rtx operands[]) vec[i * 2 + 1] = const1_rtx; } vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec)); - vt = force_const_mem (maskmode, vt); + vt = validize_mem (force_const_mem (maskmode, vt)); t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1, OPTAB_DIRECT); @@ -20223,7 +20223,7 @@ ix86_expand_vec_perm (rtx operands[]) for (i = 0; i < 16; ++i) vec[i] = GEN_INT (i/e * e); vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); - vt = force_const_mem (V16QImode, vt); + vt = validize_mem (force_const_mem (V16QImode, vt)); if (TARGET_XOP) emit_insn (gen_xop_pperm (mask, mask, mask, vt)); else @@ -20234,7 +20234,7 @@ ix86_expand_vec_perm (rtx operands[]) for (i = 0; i < 16; ++i) vec[i] = GEN_INT (i % e); vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); - vt = force_const_mem (V16QImode, vt); + vt = validize_mem (force_const_mem (V16QImode, vt)); emit_insn (gen_addv16qi3 (mask, mask, vt)); } diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d462b76cbe47..627beee98f92 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3444,9 +3444,9 @@ }) (define_insn "*zero_extendsidi2_rex64" - [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?*y,?*Yi,*x") + [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?!*y,?*Yi,*x") (zero_extend:DI - (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] + (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] "TARGET_64BIT" "@ mov{l}\t{%1, %k0|%k0, %1} @@ -3469,9 +3469,9 @@ ;; %%% Kill me once multi-word ops are sane. (define_insn "zero_extendsidi2_1" - [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?*y,?*Yi,*x") + [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?!*y,?*Yi,*x") (zero_extend:DI - (match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m"))) + (match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m"))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT" "@ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fda80e8a6c55..2dcb7426a1f0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,17 @@ +2013-04-30 Uros Bizjak + + Backport from mainline + 2013-04-29 Uros Bizjak + + PR target/44578 + * gcc.target/i386/pr44578.c: New test. + + Backport from mainline + 2013-04-29 Uros Bizjak + + PR target/57098 + * gcc.target/i386/pr57098.c: New test. + 2013-04-29 Christian Bruel PR target/57108 diff --git a/gcc/testsuite/gcc.target/i386/pr44578.c b/gcc/testsuite/gcc.target/i386/pr44578.c new file mode 100644 index 000000000000..20f76c31c41a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr44578.c @@ -0,0 +1,31 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mtune=athlon64" } */ + +extern void abort (void); + +long double +__attribute__((noinline, noclone)) +test (float num) +{ + unsigned int i; + + if (num < 0.0) + num = 0.0; + + __builtin_memcpy (&i, &num, sizeof(unsigned int)); + + return (long double)(unsigned long long) i; +} + +int +main () +{ + long double x; + + x = test (0.0); + + if (x != 0.0) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr57098.c b/gcc/testsuite/gcc.target/i386/pr57098.c new file mode 100644 index 000000000000..37598d7cef49 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr57098.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-msse4 -mcmodel=large" } */ + +typedef int V __attribute__((vector_size(16))); + +void foo (V *p, V *mask) +{ + *p = __builtin_shuffle (*p, *mask); +} -- 2.47.2