From bc3a77cdcdbecf8f21d64ec37ee097644ae46cb0 Mon Sep 17 00:00:00 2001 From: mengqinggang Date: Wed, 19 Nov 2025 14:19:39 +0800 Subject: [PATCH] LoongArch: Fix uint64_t a & 0xfffffffffff on LA32 "uint64_t a & 0xfffffffffff" expands to two and:SI on LA32 with -O0: (insn 8 7 9 (set (subreg:SI (reg:DI 82 [ a_2 ]) 0) (and:SI (reg:SI 83) (const_int -1 [0xffffffffffffffff]))) "t.c":3:5 -1 (nil)) (insn 10 9 11 (set (subreg:SI (reg:DI 82 [ a_2 ]) 4) (and:SI (reg:SI 84) (const_int 4095 [0xfff]))) "t.c":3:5 -1 (nil)) "insn 8" -1 operand can't match Yx constraint low_bitmask_len condition. low_bitmask_len can selects a field of low-order bits within an item but not the entire word. Add (match_test "INTVAL (op) == -1") to low_bitmask_operand predicate. Note: "uint64_t a & 0xffffffffffffffff" and "uint32_t a & 0xffffffff" are optimized away before expand with -O0, can't cause this error. gcc/ChangeLog: * config/loongarch/predicates.md: Add CONSTM1_RTX for low_bitmask_operand. gcc/testsuite/ChangeLog: * gcc.target/loongarch/la32/and.c: New test. * gcc.target/loongarch/la32/la32.exp: New test. Reviewed-by: Xi Ruoyao Reviewed-by: Lulu Cheng --- gcc/config/loongarch/predicates.md | 4 +- gcc/testsuite/gcc.target/loongarch/la32/and.c | 8 ++++ .../gcc.target/loongarch/la32/la32.exp | 40 +++++++++++++++++++ 3 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/la32/and.c create mode 100644 gcc/testsuite/gcc.target/loongarch/la32/la32.exp diff --git a/gcc/config/loongarch/predicates.md b/gcc/config/loongarch/predicates.md index 980ae5cc8dd..94d4ff744ff 100644 --- a/gcc/config/loongarch/predicates.md +++ b/gcc/config/loongarch/predicates.md @@ -295,7 +295,9 @@ (define_predicate "low_bitmask_operand" (and (match_code "const_int") - (match_test "low_bitmask_len (mode, INTVAL (op)) > 12") + (ior + (match_test "low_bitmask_len (mode, INTVAL (op)) > 12") + (match_test "op == CONSTM1_RTX (GET_MODE (op))")) (match_test "!TARGET_32BIT_R"))) (define_predicate "d_operand" diff --git a/gcc/testsuite/gcc.target/loongarch/la32/and.c b/gcc/testsuite/gcc.target/loongarch/la32/and.c new file mode 100644 index 00000000000..4e6c2166e0e --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/la32/and.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-O0" } */ + +#include +uint64_t f(uint64_t a) { + a = a & 0xfffffffffffff; + return a; +} diff --git a/gcc/testsuite/gcc.target/loongarch/la32/la32.exp b/gcc/testsuite/gcc.target/loongarch/la32/la32.exp new file mode 100644 index 00000000000..52055fb5f63 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/la32/la32.exp @@ -0,0 +1,40 @@ +# Copyright (C) 2021-2025 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +# GCC testsuite that uses the `dg.exp' driver. + +# Exit immediately if this isn't a LoongArch target. +if ![istarget loongarch32*-*-*] then { + return +} + +# Load support procs. +load_lib gcc-dg.exp + +# If a testcase doesn't have special options, use these. +global DEFAULT_CFLAGS +if ![info exists DEFAULT_CFLAGS] then { + set DEFAULT_CFLAGS " " +} + +# Initialize `dg'. +dg-init + +# Main loop. +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \ + "" $DEFAULT_CFLAGS +# All done. +dg-finish -- 2.47.3