From bd462aa2027ff3dc80741045b03260fdcd273b12 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 13 Jan 2026 00:45:56 +0100 Subject: [PATCH] arm64: dts: renesas: sparrow-hawk: Mark OTP and HSCIF0 pins as bootph-all The U-Boot SPL is responsible for initializing the hardware and it does also initialize HSCIF0 and its pinmux, mark the HSCIF0 pinmux as needed in all bootloader stages. The SPL also uses OTP to determine the exact V4H SoC variant during DRAM initialization, to determine which is the maximum allowed DRAM rate, mark OTP as required in all bootloader stages as well. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260112234642.225993-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts index ff07d984cbf29..3b47e3ce95d47 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts +++ b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts @@ -536,6 +536,10 @@ }; }; +&otp { + bootph-all; +}; + /* Page 26 / 2230 Key M M.2 */ &pcie0_clkref { status = "disabled"; @@ -620,6 +624,7 @@ hscif0_pins: hscif0 { groups = "hscif0_data", "hscif0_ctrl"; function = "hscif0"; + bootph-all; }; /* Page 23 / DEBUG */ -- 2.47.3