From bf407987e98b89c9ca10bb23128fec627bfca434 Mon Sep 17 00:00:00 2001 From: shinwell Date: Mon, 19 Mar 2007 21:00:14 +0000 Subject: [PATCH] gcc/testsuite/ * gcc.target/arm/register-variables.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@123071 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/testsuite/ChangeLog | 4 ++++ .../gcc.target/arm/register-variables.c | 21 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 gcc/testsuite/gcc.target/arm/register-variables.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 72474a89ce2b..2ac81780bf87 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2007-03-19 Mark Shinwell + + * gcc.target/arm/register-variables.c: New. + 2007-03-19 Jeff Law * PR tree-optimization/30984 diff --git a/gcc/testsuite/gcc.target/arm/register-variables.c b/gcc/testsuite/gcc.target/arm/register-variables.c new file mode 100644 index 000000000000..8c874b22eed8 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/register-variables.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-options "-O" } */ + +#include + +void __attribute__((noinline)) +bar(int a, int b) +{ + if (a != 43 || b != 42) + abort(); +} + +int main(void) +{ + register int r0 asm("r0") = 42; + register int r1 asm("r1") = 43; + asm volatile("": "+r" (r0), "+r" (r1)); + bar(r1, r0); + return 0; +} + -- 2.47.2