From bf69edf8ce47ca618eff30df2308279a40b22096 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 9 Sep 2020 10:29:47 -0700 Subject: [PATCH] x32: Update gcc.target/i386/builtin_thread_pointer.c Update gcc.target/i386/builtin_thread_pointer.c for x32. For int foo3 (int i) { int* p = (int*) __builtin_thread_pointer (); return p[i]; } we can't generate: movl %fs:0(,%edi,4), %eax ret for x32 since the address of %fs:0(,%edi,4) is %fs + zero-extended to 64 bits of 0(,%edi,4). Instead, we generate: movl %fs:0, %eax movl (%eax,%edi,4), %eax PR target/96955 * gcc.target/i386/builtin_thread_pointer.c: Update scan-assembler for x32. --- gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c b/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c index dce314881178..16a7ca49b990 100644 --- a/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c +++ b/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c @@ -25,4 +25,6 @@ foo3 (int i) return p[i]; } -/* { dg-final { scan-assembler "movl\[ \t\]*%\[fg\]s:0\\(,%\[a-z0-9\]*,4\\), %eax" } } */ +/* { dg-final { scan-assembler "movl\[ \t\]*%\[fg\]s:0\\(,%\[a-z0-9\]*,4\\), %eax" { target { ! x32 } } } } */ +/* { dg-final { scan-assembler-not "movl\[ \t\]*%fs:0\\(,%\[a-z0-9\]*,4\\), %eax" { target x32 } } } */ +/* { dg-final { scan-assembler "movl\[ \t\]*\\(%eax,%edi,4\\), %eax" { target x32 } } } */ -- 2.47.2