From c01b52830fdc8e907e9f8462d5d7d798b7ed19dc Mon Sep 17 00:00:00 2001 From: Yang Wang Date: Wed, 10 Dec 2025 20:33:43 +0800 Subject: [PATCH] drm/amd/pm: fix pp_dpm_pcie wrong state issue for smu v14.0.2 put wrong value into incorrect data into following function, which caused it to fail to match the correct item on smu v14.0.2: smu_cmn_print_pcie_levels() Fixes: 03d11f8564ca ("drm/amd/pm: Use common helper for smuv14.0.2 dpm") Signed-off-by: Yang Wang Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c index b1016debdf06..ea08dc11d754 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c @@ -1095,8 +1095,10 @@ static int smu_v14_0_2_emit_clk_levels(struct smu_context *smu, return ret; pcie_table = &(dpm_context->dpm_tables.pcie_table); - return smu_cmn_print_pcie_levels(smu, pcie_table, gen_speed, - lane_width, buf, offset); + return smu_cmn_print_pcie_levels(smu, pcie_table, + SMU_DPM_PCIE_GEN_IDX(gen_speed), + SMU_DPM_PCIE_WIDTH_IDX(lane_width), + buf, offset); case SMU_OD_SCLK: if (!smu_v14_0_2_is_od_feature_supported(smu, -- 2.47.3