From c08b032fef55701218bbcb738e96a4f034bb19b9 Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Thu, 28 Apr 2011 21:03:54 +0000 Subject: [PATCH] Handle Iop_Not64 when doing 32-bit code generation. Also, assert that iselWordExpr_R is not asked to handle Iop_Not64 in 32-bit mode. Fixes #270856. (Maynard Johnson, maynardj@us.ibm.com) git-svn-id: svn://svn.valgrind.org/vex/trunk@2136 --- VEX/priv/host_ppc_isel.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c index 816c270591..0f82e85c91 100644 --- a/VEX/priv/host_ppc_isel.c +++ b/VEX/priv/host_ppc_isel.c @@ -1615,6 +1615,7 @@ static HReg iselWordExpr_R_wrk ( ISelEnv* env, IRExpr* e ) case Iop_Not16: case Iop_Not32: case Iop_Not64: { + if (op_unop == Iop_Not64) vassert(mode64); HReg r_dst = newVRegI(env); HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); addInstr(env, PPCInstr_Unary(Pun_NOT,r_dst,r_src)); @@ -2885,6 +2886,18 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, return; } + case Iop_Not64: { + HReg xLo, xHi; + HReg tmpLo = newVRegI(env); + HReg tmpHi = newVRegI(env); + iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg); + addInstr(env, PPCInstr_Unary(Pun_NOT,tmpLo,xLo)); + addInstr(env, PPCInstr_Unary(Pun_NOT,tmpHi,xHi)); + *rHi = tmpHi; + *rLo = tmpLo; + return; + } + /* ReinterpF64asI64(e) */ /* Given an IEEE754 double, produce an I64 with the same bit pattern. */ -- 2.47.2