From c1bf576037ef8fe665abb47c11336e91f007e34c Mon Sep 17 00:00:00 2001 From: Hongren Zheng Date: Thu, 18 Apr 2024 11:59:03 +0800 Subject: [PATCH] Print CPUINFO also for riscv processors Reviewed-by: Paul Dale Reviewed-by: Tomas Mraz (Merged from https://github.com/openssl/openssl/pull/24172) --- crypto/info.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/crypto/info.c b/crypto/info.c index 9ef9ee47047..3c74fd58e0d 100644 --- a/crypto/info.c +++ b/crypto/info.c @@ -21,6 +21,9 @@ #elif defined(__s390__) || defined(__s390x__) # include "s390x_arch.h" # define CPU_INFO_STR_LEN 2048 +#elif defined(__riscv) +# include "crypto/riscv_arch.h" +# define CPU_INFO_STR_LEN 2048 #else # define CPU_INFO_STR_LEN 128 #endif @@ -98,6 +101,33 @@ DEFINE_RUN_ONCE_STATIC(init_info_strings) BIO_snprintf(ossl_cpu_info_str + strlen(ossl_cpu_info_str), sizeof(ossl_cpu_info_str) - strlen(ossl_cpu_info_str), " env:%s", env); +# elif defined(__riscv) + const char *env; + char sep = '='; + + BIO_snprintf(ossl_cpu_info_str, sizeof(ossl_cpu_info_str), + CPUINFO_PREFIX "OPENSSL_riscvcap"); + for (size_t i = 0; i < kRISCVNumCaps; ++i) { + if (OPENSSL_riscvcap_P[RISCV_capabilities[i].index] + & (1 << RISCV_capabilities[i].bit_offset)) { + /* Match, display the name */ + BIO_snprintf(ossl_cpu_info_str + strlen(ossl_cpu_info_str), + sizeof(ossl_cpu_info_str) - strlen(ossl_cpu_info_str), + "%c%s", sep, RISCV_capabilities[i].name); + /* Only the first sep is '=' */ + sep = '_'; + } + } + /* If no capability is found, add back the = */ + if (sep == '=') { + BIO_snprintf(ossl_cpu_info_str + strlen(ossl_cpu_info_str), + sizeof(ossl_cpu_info_str) - strlen(ossl_cpu_info_str), + "%c", sep); + } + if ((env = getenv("OPENSSL_riscvcap")) != NULL) + BIO_snprintf(ossl_cpu_info_str + strlen(ossl_cpu_info_str), + sizeof(ossl_cpu_info_str) - strlen(ossl_cpu_info_str), + " env:%s", env); # endif #endif -- 2.47.2