From c2cac27dba3db3348563154f9b4b436ecde7b09a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 29 Sep 2025 15:40:33 +0200 Subject: [PATCH] system/physmem: Pass address space argument to cpu_flush_icache_range() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Rename cpu_flush_icache_range() as address_space_flush_icache_range(), passing an address space by argument. The single caller, rom_reset(), already operates on an address space. Use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20251002084203.63899-7-philmd@linaro.org> --- hw/core/loader.c | 2 +- include/exec/cpu-common.h | 2 -- include/system/memory.h | 2 ++ system/physmem.c | 5 ++--- 4 files changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/core/loader.c b/hw/core/loader.c index 524af6f14a0..477661a0255 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1242,7 +1242,7 @@ static void rom_reset(void *unused) * that the instruction cache for that new region is clear, so that the * CPU definitely fetches its instructions from the just written data. */ - cpu_flush_icache_range(rom->addr, rom->datasize); + address_space_flush_icache_range(rom->as, rom->addr, rom->datasize); trace_loader_write_rom(rom->name, rom->addr, rom->datasize, rom->isrom); } diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 55911c1d9fe..2e5aa684e92 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -156,8 +156,6 @@ void cpu_physical_memory_unmap(void *buffer, hwaddr len, */ void qemu_flush_coalesced_mmio_buffer(void); -void cpu_flush_icache_range(hwaddr start, hwaddr len); - typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); diff --git a/include/system/memory.h b/include/system/memory.h index f222743b6fd..3bd5ffa5e0d 100644 --- a/include/system/memory.h +++ b/include/system/memory.h @@ -2995,6 +2995,8 @@ void address_space_cache_invalidate(MemoryRegionCache *cache, */ void address_space_cache_destroy(MemoryRegionCache *cache); +void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len); + /* address_space_get_iotlb_entry: translate an address into an IOTLB * entry. Should be called from an RCU critical section. */ diff --git a/system/physmem.c b/system/physmem.c index c8a1fda55b0..018b8f31577 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3212,7 +3212,7 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, return MEMTX_OK; } -void cpu_flush_icache_range(hwaddr addr, hwaddr len) +void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len) { /* * This function should do the same thing as an icache flush that was @@ -3227,8 +3227,7 @@ void cpu_flush_icache_range(hwaddr addr, hwaddr len) RCU_READ_LOCK_GUARD(); while (len > 0) { hwaddr addr1, l = len; - MemoryRegion *mr = address_space_translate(&address_space_memory, - addr, &addr1, &l, true, + MemoryRegion *mr = address_space_translate(as, addr, &addr1, &l, true, MEMTXATTRS_UNSPECIFIED); if (!memory_region_supports_direct_access(mr)) { -- 2.47.3