From c4c44802ab32fba9ea0305aa3db86fdffbe9e152 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Fri, 9 Nov 2018 13:17:52 -0700 Subject: [PATCH] mips.c (mips_loongson_ext2_prefetch_cookie): Handle unused argument better. * config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): Handle unused argument better. Add gcc_unreachable to silence warning. From-SVN: r265986 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.c | 4 +++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e0225c58ffb9..b7f3b71d8970 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-11-09 Jeff Law + + * config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): Handle + unused argument better. Add gcc_unreachable to silence warning. + 2018-11-09 Martin Sebor PR middle-end/81824 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index d78e2056ec2b..17a2a66956e6 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -15155,7 +15155,7 @@ mips_prefetch_cookie (rtx write, rtx locality) (prefetch for store), other hint just scale to hint = 0 and hint = 1. */ rtx -mips_loongson_ext2_prefetch_cookie (rtx write, rtx locality) +mips_loongson_ext2_prefetch_cookie (rtx write, rtx) { /* store. */ if (INTVAL (write) == 1) @@ -15164,6 +15164,8 @@ mips_loongson_ext2_prefetch_cookie (rtx write, rtx locality) /* load. */ if (INTVAL (write) == 0) return GEN_INT (INTVAL (write)); + + gcc_unreachable (); } -- 2.47.2