From c65002347e595cda8b15e59e734d209283faf2b6 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao.liu@intel.com>
Date: Tue, 28 May 2024 10:32:12 +0800
Subject: [PATCH] Fix predicate mismatch between vfcmaddcph's define_insn and
 define_expand.

When I applied Roger's patch [1], there's ICE due to it.
The patch fix the latent bug.

[1] https://gcc.gnu.org/pipermail/gcc-patches/2024-May/651365.html

gcc/ChangeLog:

	* config/i386/sse.md
	(<avx512>_<complexopname>_<mode>_mask<round_name>): Align
	operands' predicate with corresponding expander.
	(<avx512>_<complexopname>_<mode><maskc_name><round_name>):
	Ditto.
---
 gcc/config/i386/sse.md | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b59c988fc31..0f4fbcb2c5d 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6867,9 +6867,9 @@
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=&v")
 	(vec_merge:VHF_AVX512VL
 	  (unspec:VHF_AVX512VL
-	    [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "<int_comm>v")
-	     (match_operand:VHF_AVX512VL 2 "nonimmediate_operand" "<round_constraint>")
-	     (match_operand:VHF_AVX512VL 3 "register_operand" "0")]
+	    [(match_operand:VHF_AVX512VL 1 "<round_nimm_predicate>" "<int_comm>v")
+	     (match_operand:VHF_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
+	     (match_operand:VHF_AVX512VL 3 "<round_nimm_predicate>" "0")]
 	     UNSPEC_COMPLEX_F_C_MA)
 	  (match_dup 1)
 	  (unspec:<avx512fmaskmode>
@@ -6892,8 +6892,8 @@
 (define_insn "<avx512>_<complexopname>_<mode><maskc_name><round_name>"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=&v")
 	  (unspec:VHF_AVX512VL
-	    [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "<int_comm>v")
-	     (match_operand:VHF_AVX512VL 2 "nonimmediate_operand" "<round_constraint>")]
+	    [(match_operand:VHF_AVX512VL 1 "<round_nimm_predicate>" "<int_comm>v")
+	     (match_operand:VHF_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")]
 	     UNSPEC_COMPLEX_F_C_MUL))]
   "TARGET_AVX512FP16 && <round_mode512bit_condition>"
 {
-- 
2.47.2