From c7789bfb8c6f12d57f24952a4ac3c0ae935db61b Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 28 Jan 2009 17:05:41 +0100 Subject: [PATCH] re PR rtl-optimization/38740 (Incorrect delayed branch optimization) PR rtl-optimization/38740 * reorg.c (gate_handle_delay_slots): Avoid dbr scheduling if !optimize. * config/mips/mips.c (mips_reorg): Likewise. From-SVN: r143733 --- gcc/ChangeLog | 7 +++++++ gcc/config/mips/mips.c | 2 +- gcc/reorg.c | 3 ++- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 526398f92c83..b2e378568312 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2009-01-28 Jakub Jelinek + + PR rtl-optimization/38740 + * reorg.c (gate_handle_delay_slots): Avoid dbr scheduling + if !optimize. + * config/mips/mips.c (mips_reorg): Likewise. + 2009-01-28 Richard Guenther PR tree-optimization/38926 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 55b1c22be66c..c98528e7eb42 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -13296,7 +13296,7 @@ mips_reorg (void) mips16_lay_out_constants (); if (mips_r10k_cache_barrier != R10K_CACHE_BARRIER_NONE) r10k_insert_cache_barriers (); - if (flag_delayed_branch) + if (optimize > 0 && flag_delayed_branch) dbr_schedule (get_insns ()); mips_reorg_process_insns (); if (!TARGET_MIPS16 diff --git a/gcc/reorg.c b/gcc/reorg.c index fd6a58e02eb9..8b3219ad446b 100644 --- a/gcc/reorg.c +++ b/gcc/reorg.c @@ -4046,7 +4046,8 @@ static bool gate_handle_delay_slots (void) { #ifdef DELAY_SLOTS - return flag_delayed_branch && !crtl->dbr_scheduled_p; + /* At -O0 dataflow info isn't updated after RA. */ + return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p; #else return 0; #endif -- 2.47.2