From c92724b40c2f36ca0f2a789cf8cb80dd51107f25 Mon Sep 17 00:00:00 2001 From: Haiyue Wang Date: Tue, 30 Dec 2025 21:30:50 +0800 Subject: [PATCH] docs: fix PPR for AMD EPYC broken link MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit As 'AMD Documentation Hub' [1] announced: "All technical documentation, including for AMD EPYC™ processors ..., and more is now hosted on the AMD Technical Information Portal (TIP) [2]". By searching the No.55898, update the new URL. [1] https://www.amd.com/en/search/documentation/hub.html [2] https://docs.amd.com/ Signed-off-by: Haiyue Wang Acked-by: Bagas Sanjaya Link: https://patch.msgid.link/20251230133101.14362-1-haiyuewa@163.com Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/arch/x86/amd_hsmp.rst | 4 ++-- Documentation/misc-devices/amd-sbi.rst | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/arch/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst index a094f55c10b0..8bb411f0d70d 100644 --- a/Documentation/arch/x86/amd_hsmp.rst +++ b/Documentation/arch/x86/amd_hsmp.rst @@ -14,7 +14,7 @@ set of mailbox registers. More details on the interface can be found in chapter "7 Host System Management Port (HSMP)" of the family/model PPR -Eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip +Eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50 HSMP interface is supported on EPYC line of server CPUs and MI300A (APU). @@ -185,7 +185,7 @@ what happened. The transaction returns 0 on success. More details on the interface and message definitions can be found in chapter "7 Host System Management Port (HSMP)" of the respective family/model PPR -eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip +eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50 User space C-APIs are made available by linking against the esmi library, which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html. diff --git a/Documentation/misc-devices/amd-sbi.rst b/Documentation/misc-devices/amd-sbi.rst index 07ceb44fbe5e..f91ddadefe48 100644 --- a/Documentation/misc-devices/amd-sbi.rst +++ b/Documentation/misc-devices/amd-sbi.rst @@ -15,7 +15,7 @@ and SB Temperature Sensor Interface (SB-TSI)). More details on the interface can be found in chapter "5 Advanced Platform Management Link (APML)" of the family/model PPR [1]_. -.. [1] https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip +.. [1] https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50 SBRMI device -- 2.47.3