From ca4310e86b527c61f15a9e7b8b1dc062daba8463 Mon Sep 17 00:00:00 2001 From: Jack Chang Date: Fri, 12 Sep 2025 15:40:18 +0800 Subject: [PATCH] drm/amd/display: Parse debug flag to PR FW [HOW & WHY] Parse debug flag to PR FW. Reviewed-by: Robin Chen Signed-off-by: Jack Chang Signed-off-by: Alex Hung Signed-off-by: Alex Deucher --- .../drm/amd/display/dc/link/protocols/link_edp_panel_control.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c index 80ee6efe91e2..07f4f15851fc 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c @@ -1373,6 +1373,7 @@ bool edp_pr_copy_settings(struct dc_link *link, struct replay_context *replay_co cmd.pr_copy_settings.data.line_time_in_ns = replay_context->line_time_in_ns; cmd.pr_copy_settings.data.flags.bitfields.fec_enable_status = (link->fec_state == dc_link_fec_enabled); cmd.pr_copy_settings.data.flags.bitfields.dsc_enable_status = (pipe_ctx->stream->timing.flags.DSC == 1); + cmd.pr_copy_settings.data.debug.u32All = link->replay_settings.config.debug_flags; dc_wake_and_execute_dmub_cmd(dc->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT); return true; -- 2.47.3