From cbb7d11b1d87d37c2895ab1d321e97dfcb228be6 Mon Sep 17 00:00:00 2001 From: Petar Jovanovic Date: Wed, 17 May 2017 15:35:48 +0000 Subject: [PATCH] mips32: update clobbers in none/mips32/LoadStore tests Add missing registers to clobbers. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16395 --- none/tests/mips32/LoadStore.c | 83 +++++++++++++++++----------------- none/tests/mips32/LoadStore1.c | 83 +++++++++++++++++----------------- 2 files changed, 84 insertions(+), 82 deletions(-) diff --git a/none/tests/mips32/LoadStore.c b/none/tests/mips32/LoadStore.c index 08bc41c87c..38574ef028 100644 --- a/none/tests/mips32/LoadStore.c +++ b/none/tests/mips32/LoadStore.c @@ -22,51 +22,52 @@ unsigned int mem2[] = { // sb $t0, 0($t1) #define TESTINST1(instruction, RTval, offset, RT, RS) \ -{ \ - unsigned int out; \ - __asm__ volatile( \ - "move $" #RS", %1\n\t" \ - "li $" #RT", " #RTval"\n\t" \ - instruction "\n\t" \ - "lw %0, "#offset"($"#RS")\n\t" \ - : "=&r" (out) \ - : "r" (mem1), "r" (RTval) \ - : #RT, "cc", "memory" \ - ); \ - printf("%s :: RTval: 0x%x, out: 0x%x\n", \ - instruction, RTval, out); \ - out = 0; \ - __asm__ volatile( \ - "move $" #RS", %1\n\t" \ - "li $" #RT", " #RTval"\n\t" \ - instruction "\n\t" \ - "lw %0, "#offset"($"#RS")\n\t" \ - : "=&r" (out) \ - : "r" (mem), "r" (RTval) \ - : #RT, "cc", "memory" \ - ); \ - printf("%s :: RTval: 0x%x, out: 0x%x\n", \ - instruction, RTval, out); \ +{ \ + unsigned int out; \ + __asm__ volatile( \ + "move $" #RS", %1 \n\t" \ + "li $" #RT", " #RTval" \n\t" \ + instruction " \n\t" \ + "lw %0, "#offset"($"#RS") \n\t" \ + : "=&r" (out) \ + : "r" (mem1), "r" (RTval) \ + : #RS, #RT, "memory" \ + ); \ + printf("%s :: RTval: 0x%x, out: 0x%x\n", \ + instruction, RTval, out); \ + out = 0; \ + __asm__ volatile( \ + "move $" #RS", %1 \n\t" \ + "li $" #RT", " #RTval " \n\t" \ + instruction " \n\t" \ + "lw %0, "#offset"($"#RS") \n\t" \ + : "=&r" (out) \ + : "r" (mem), "r" (RTval) \ + : #RS, #RT, "memory" \ + ); \ + printf("%s :: RTval: 0x%x, out: 0x%x\n", \ + instruction, RTval, out); \ } // swl $t0, 3($t1) // swr $t0, 0($t1) -#define TESTINSTsw(RTval, offset, RT, RS) \ -{ \ - unsigned int out; \ - __asm__ volatile( \ - "move $" #RS", %1\n\t" \ - "addiu $"#RS", $"#RS", "#offset"\n\t" \ - "li $" #RT", " #RTval"\n\t" \ - "swl $t0, 3($t1) \n\t" \ - "swr $t0, 0($t1) \n\t" \ - "lw %0, 0($"#RS")\n\t" \ - : "=&r" (out) \ - : "r" (mem2), "r" (RTval) \ - : #RT, #RS, "cc", "memory" \ - ); \ - printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n :: RTval: 0x%x, out: 0x%x\n", \ - RTval, out); \ +#define TESTINSTsw(RTval, offset, RT, RS) \ +{ \ + unsigned int out; \ + __asm__ volatile( \ + "move $" #RS", %1\n\t" \ + "addiu $"#RS", $"#RS", "#offset" \n\t" \ + "li $" #RT", " #RTval" \n\t" \ + "swl $t0, 3($t1) \n\t" \ + "swr $t0, 0($t1) \n\t" \ + "lw %0, 0($"#RS") \n\t" \ + : "=&r" (out) \ + : "r" (mem2), "r" (RTval) \ + : #RT, #RS, "memory" \ + ); \ + printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n" \ + " :: RTval: 0x%x, out: 0x%x\n", \ + RTval, out); \ } void ppMem(unsigned int* m, int len) diff --git a/none/tests/mips32/LoadStore1.c b/none/tests/mips32/LoadStore1.c index a6547b2c47..6a54303226 100644 --- a/none/tests/mips32/LoadStore1.c +++ b/none/tests/mips32/LoadStore1.c @@ -22,51 +22,52 @@ unsigned int mem2[] = { // sb $t0, 0($t1) #define TESTINST1(instruction, RTval, offset, RT, RS) \ -{ \ - unsigned int out; \ - __asm__ volatile( \ - "move $" #RS", %1\n\t" \ - "li $" #RT", " #RTval"\n\t" \ - instruction "\n\t" \ - "lw %0, "#offset"($"#RS")\n\t" \ - : "=&r" (out) \ - : "r" (mem1), "r" (RTval) \ - : #RT, "cc", "memory" \ - ); \ - printf("%s :: RTval: 0x%x, out: 0x%x\n", \ - instruction, RTval, out); \ - out = 0; \ - __asm__ volatile( \ - "move $" #RS", %1\n\t" \ - "li $" #RT", " #RTval"\n\t" \ - instruction "\n\t" \ - "lw %0, "#offset"($"#RS")\n\t" \ - : "=&r" (out) \ - : "r" (mem), "r" (RTval) \ - : #RT, "cc", "memory" \ - ); \ - printf("%s :: RTval: 0x%x, out: 0x%x\n", \ - instruction, RTval, out); \ +{ \ + unsigned int out; \ + __asm__ volatile( \ + "move $" #RS", %1 \n\t" \ + "li $" #RT", " #RTval" \n\t" \ + instruction " \n\t" \ + "lw %0, "#offset"($"#RS") \n\t" \ + : "=&r" (out) \ + : "r" (mem1), "r" (RTval) \ + : #RS, #RT, "memory" \ + ); \ + printf("%s :: RTval: 0x%x, out: 0x%x\n", \ + instruction, RTval, out); \ + out = 0; \ + __asm__ volatile( \ + "move $" #RS", %1 \n\t" \ + "li $" #RT", " #RTval " \n\t" \ + instruction " \n\t" \ + "lw %0, "#offset"($"#RS") \n\t" \ + : "=&r" (out) \ + : "r" (mem), "r" (RTval) \ + : #RS, #RT, "memory" \ + ); \ + printf("%s :: RTval: 0x%x, out: 0x%x\n", \ + instruction, RTval, out); \ } // swl $t0, 3($t1) // swr $t0, 0($t1) -#define TESTINSTsw(RTval, offset, RT, RS) \ -{ \ - unsigned int out; \ - __asm__ volatile( \ - "move $" #RS", %1\n\t" \ - "addiu $"#RS", $"#RS", "#offset"\n\t" \ - "li $" #RT", " #RTval"\n\t" \ - "swl $t0, 3($t1) \n\t" \ - "swr $t0, 0($t1) \n\t" \ - "lw %0, 0($"#RS")\n\t" \ - : "=&r" (out) \ - : "r" (mem2), "r" (RTval) \ - : #RT, #RS, "cc", "memory" \ - ); \ - printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n :: RTval: 0x%x, out: 0x%x\n", \ - RTval, out); \ +#define TESTINSTsw(RTval, offset, RT, RS) \ +{ \ + unsigned int out; \ + __asm__ volatile( \ + "move $" #RS", %1\n\t" \ + "addiu $"#RS", $"#RS", "#offset" \n\t" \ + "li $" #RT", " #RTval" \n\t" \ + "swl $t0, 3($t1) \n\t" \ + "swr $t0, 0($t1) \n\t" \ + "lw %0, 0($"#RS") \n\t" \ + : "=&r" (out) \ + : "r" (mem2), "r" (RTval) \ + : #RT, #RS, "memory" \ + ); \ + printf("swl $t0, 3($t1)\nswr $t0, 0($t1)\n" \ + " :: RTval: 0x%x, out: 0x%x\n", \ + RTval, out); \ } void ppMem(unsigned int* m, int len) -- 2.47.2