From cca80986b5644c1c8c3895b88be6c03817f0c19a Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Fri, 9 May 2025 20:10:28 +0800 Subject: [PATCH] rockchip: replace RK356x RNG patch with upstream Replace RK356x RNG patch with upstream version to add the tag flag them as upstreamed. Signed-off-by: Chukun Pan Link: https://github.com/openwrt/openwrt/pull/18800 Signed-off-by: Robert Marko --- ...d-hwrng-driver-for-Rockchip-RK3568-.patch} | 41 ++++++++++--------- ...chip-add-DT-entry-for-RNG-to-RK356x.patch} | 20 ++++----- ...ip-drop-obsolete-reset-names-from-rk.patch | 28 +++++++++++++ ...p-add-reset-names-for-combphy-on-rk.patch} | 4 +- 4 files changed, 61 insertions(+), 32 deletions(-) rename target/linux/rockchip/patches-6.6/{300-hwrng-add-hwrng-driver-for-Rockchip-RK3568-SoC.patch => 016-v6.12-hwrng-rockchip-add-hwrng-driver-for-Rockchip-RK3568-.patch} (89%) rename target/linux/rockchip/patches-6.6/{301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch => 017-v6.12-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch} (65%) create mode 100644 target/linux/rockchip/patches-6.6/018-v6.12-arm64-dts-rockchip-drop-obsolete-reset-names-from-rk.patch rename target/linux/rockchip/patches-6.6/{016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch => 019-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk.patch} (97%) diff --git a/target/linux/rockchip/patches-6.6/300-hwrng-add-hwrng-driver-for-Rockchip-RK3568-SoC.patch b/target/linux/rockchip/patches-6.6/016-v6.12-hwrng-rockchip-add-hwrng-driver-for-Rockchip-RK3568-.patch similarity index 89% rename from target/linux/rockchip/patches-6.6/300-hwrng-add-hwrng-driver-for-Rockchip-RK3568-SoC.patch rename to target/linux/rockchip/patches-6.6/016-v6.12-hwrng-rockchip-add-hwrng-driver-for-Rockchip-RK3568-.patch index 683d1b1d5e5..7eed8cc8774 100644 --- a/target/linux/rockchip/patches-6.6/300-hwrng-add-hwrng-driver-for-Rockchip-RK3568-SoC.patch +++ b/target/linux/rockchip/patches-6.6/016-v6.12-hwrng-rockchip-add-hwrng-driver-for-Rockchip-RK3568-.patch @@ -1,7 +1,7 @@ -From cea47ad1fbd46d3096fcf5c6905db3d12b5da960 Mon Sep 17 00:00:00 2001 +From dcf4fef6631c302f9bdd188979fe3172e47a29c7 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno -Date: Sun, 21 Jul 2024 01:48:04 +0100 -Subject: [PATCH 2/3] hwrng: add hwrng driver for Rockchip RK3568 SoC +Date: Tue, 30 Jul 2024 17:11:04 +0100 +Subject: [PATCH] hwrng: rockchip - add hwrng driver for Rockchip RK3568 SoC Rockchip SoCs used to have a random number generator as part of their crypto device, and support for it has to be added to the corresponding @@ -11,17 +11,21 @@ greatly inspired from the downstream driver. The TRNG device does not seem to have a signal conditionner and the FIPS 140-2 test returns a lot of failures. They can be reduced by increasing -rockchip,sample-count in DT, in a tradeoff between quality and speed. +RK_RNG_SAMPLE_CNT, in a tradeoff between quality and speed. This value +has been adjusted to get ~90% of successes and the quality value has +been set accordingly. Signed-off-by: Aurelien Jarno -[daniel@makrotpia.org: code style fixes, add DT properties] +[daniel@makrotpia.org: code style fixes] Signed-off-by: Daniel Golle Acked-by: Krzysztof Kozlowski +Signed-off-by: Herbert Xu --- + MAINTAINERS | 1 + drivers/char/hw_random/Kconfig | 14 ++ drivers/char/hw_random/Makefile | 1 + - drivers/char/hw_random/rockchip-rng.c | 230 ++++++++++++++++++++++++++ - 4 files changed, 246 insertions(+) + drivers/char/hw_random/rockchip-rng.c | 227 ++++++++++++++++++++++++++ + 4 files changed, 243 insertions(+) create mode 100644 drivers/char/hw_random/rockchip-rng.c --- a/drivers/char/hw_random/Kconfig @@ -57,7 +61,7 @@ Acked-by: Krzysztof Kozlowski obj-$(CONFIG_HW_RANDOM_JH7110) += jh7110-trng.o --- /dev/null +++ b/drivers/char/hw_random/rockchip-rng.c -@@ -0,0 +1,230 @@ +@@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * rockchip-rng.c True Random Number Generator driver for Rockchip RK3568 SoC @@ -85,6 +89,13 @@ Acked-by: Krzysztof Kozlowski +#define RK_RNG_POLL_PERIOD_US 100 +#define RK_RNG_POLL_TIMEOUT_US 10000 + ++/* ++ * TRNG collects osc ring output bit every RK_RNG_SAMPLE_CNT time. The value is ++ * a tradeoff between speed and quality and has been adjusted to get a quality ++ * of ~900 (~87.5% of FIPS 140-2 successes). ++ */ ++#define RK_RNG_SAMPLE_CNT 1000 ++ +/* TRNG registers from RK3568 TRM-Part2, section 5.4.1 */ +#define TRNG_RST_CTL 0x0004 +#define TRNG_RNG_CTL 0x0400 @@ -108,7 +119,6 @@ Acked-by: Krzysztof Kozlowski + struct reset_control *rst; + int clk_num; + struct clk_bulk_data *clk_bulks; -+ u32 sample_cnt; +}; + +/* The mask in the upper 16 bits determines the bits that are updated */ @@ -131,7 +141,7 @@ Acked-by: Krzysztof Kozlowski + } + + /* set the sample period */ -+ writel(rk_rng->sample_cnt, rk_rng->base + TRNG_RNG_SAMPLE_CNT); ++ writel(RK_RNG_SAMPLE_CNT, rk_rng->base + TRNG_RNG_SAMPLE_CNT); + + /* set osc ring speed and enable it */ + rk_rng_write_ctl(rk_rng, TRNG_RNG_CTL_LEN_256_BIT | @@ -187,7 +197,6 @@ Acked-by: Krzysztof Kozlowski +{ + struct device *dev = &pdev->dev; + struct rk_rng *rk_rng; -+ u32 quality; + int ret; + + rk_rng = devm_kzalloc(dev, sizeof(*rk_rng), GFP_KERNEL); @@ -208,14 +217,6 @@ Acked-by: Krzysztof Kozlowski + return dev_err_probe(dev, PTR_ERR(rk_rng->rst), + "Failed to get reset property\n"); + -+ ret = of_property_read_u32(dev->of_node, "rockchip,sample-count", &rk_rng->sample_cnt); -+ if (ret) -+ return dev_err_probe(dev, ret, "Failed to get sample-count property\n"); -+ -+ ret = of_property_read_u32(dev->of_node, "quality", &quality); -+ if (ret || quality > 1024) -+ return dev_err_probe(dev, ret, "Failed to get quality property\n"); -+ + reset_control_assert(rk_rng->rst); + udelay(2); + reset_control_deassert(rk_rng->rst); @@ -229,7 +230,7 @@ Acked-by: Krzysztof Kozlowski + } + rk_rng->rng.read = rk_rng_read; + rk_rng->rng.priv = (unsigned long) dev; -+ rk_rng->rng.quality = quality; ++ rk_rng->rng.quality = 900; + + pm_runtime_set_autosuspend_delay(dev, RK_RNG_AUTOSUSPEND_DELAY); + pm_runtime_use_autosuspend(dev); diff --git a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch b/target/linux/rockchip/patches-6.6/017-v6.12-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch similarity index 65% rename from target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch rename to target/linux/rockchip/patches-6.6/017-v6.12-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch index 6ba8002c756..bd25881f6b6 100644 --- a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch +++ b/target/linux/rockchip/patches-6.6/017-v6.12-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch @@ -1,27 +1,27 @@ -From 756e7d3251ad8f6c72e7bf4c476537a89f673e38 Mon Sep 17 00:00:00 2001 +From afeccc4084963aaa932931b734c8def55613c483 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno -Date: Sun, 21 Jul 2024 01:48:38 +0100 -Subject: [PATCH 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x +Date: Tue, 30 Jul 2024 17:11:44 +0100 +Subject: [PATCH] arm64: dts: rockchip: add DT entry for RNG to RK356x -Enable the just added Rockchip RNG driver for RK356x SoCs. +Include the just added Rockchip RNG driver for RK356x SoCs and +enable it on RK3568. Signed-off-by: Aurelien Jarno Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/d2beb15377dc8b580ca5557b1a4a6f50b74055aa.1722355365.git.daniel@makrotopia.org +Signed-off-by: Heiko Stuebner --- - arch/arm64/boot/dts/rockchip/rk3568.dtsi | 7 +++++++ + arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++ - 2 files changed, 17 insertions(+) + 2 files changed, 14 insertions(+) --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -@@ -258,6 +258,13 @@ +@@ -257,6 +257,10 @@ }; }; +&rng { -+ rockchip,sample-count = <1000>; -+ quality = <900>; -+ + status = "okay"; +}; + diff --git a/target/linux/rockchip/patches-6.6/018-v6.12-arm64-dts-rockchip-drop-obsolete-reset-names-from-rk.patch b/target/linux/rockchip/patches-6.6/018-v6.12-arm64-dts-rockchip-drop-obsolete-reset-names-from-rk.patch new file mode 100644 index 00000000000..14fcf50c22d --- /dev/null +++ b/target/linux/rockchip/patches-6.6/018-v6.12-arm64-dts-rockchip-drop-obsolete-reset-names-from-rk.patch @@ -0,0 +1,28 @@ +From ec532f3591ce6e6ed5ec6c35773a66aae118e1f0 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Thu, 15 Aug 2024 18:25:19 +0200 +Subject: [PATCH] arm64: dts: rockchip: drop obsolete reset-names from rk356x + rng node + +The reset-names property is not part of the binding, so drop it. +It is also not used by the driver, so that property was likely +a leftover from some vendor-kernel node. + +Fixes: afeccc408496 ("arm64: dts: rockchip: add DT entry for RNG to RK356x") +Reported-by: Rob Herring +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20240815162519.751193-1-heiko@sntech.de +--- + arch/arm64/boot/dts/rockchip/rk356x.dtsi | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi +@@ -1112,7 +1112,6 @@ + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; + clock-names = "core", "ahb"; + resets = <&cru SRST_TRNG_NS>; +- reset-names = "reset"; + status = "disabled"; + }; + diff --git a/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch b/target/linux/rockchip/patches-6.6/019-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk.patch similarity index 97% rename from target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch rename to target/linux/rockchip/patches-6.6/019-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk.patch index 7a8f86a46fd..e98db5ffec5 100644 --- a/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch +++ b/target/linux/rockchip/patches-6.6/019-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk.patch @@ -26,7 +26,7 @@ Signed-off-by: Heiko Stuebner #phy-cells = <1>; --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -1747,6 +1747,7 @@ +@@ -1756,6 +1756,7 @@ assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY1>; @@ -34,7 +34,7 @@ Signed-off-by: Heiko Stuebner rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf1>; #phy-cells = <1>; -@@ -1763,6 +1764,7 @@ +@@ -1772,6 +1773,7 @@ assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY2>; -- 2.47.2