From cde4e63e847b4d41f017c2beb119c2668106a88a Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Sat, 29 Nov 2025 11:29:27 +0100 Subject: [PATCH] spi: spi-qpic-snand: remove superfluous qcom_spi_set_read_loc() calls Before configuring the registers related to page read, both the qcom_spi_read_page_ecc() and the qcom_spi_read_page_oob() functions are calling qcom_spi_set_read_loc() to set the read location for the first codeword. However the qcom_spi_set_read_loc() function puts the passed value into the register write cache only, from where those gets written to the corresponding register later via DMA. Yet, the qcom_spi_set_read_loc() is also gets called within the internal loops, and during the first iteration the read location register values written by the initial call gets overwritten in the register cache. This means that the values written by the first calls are never getting used in practice, so remove the calls as those are superfluous. Signed-off-by: Gabor Juhos Link: https://patch.msgid.link/20251129-qpic-snand-superfluous-readloc-v1-1-b84ca17095d9@gmail.com Signed-off-by: Mark Brown --- drivers/spi/spi-qpic-snand.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c index 7681a91d67d56..0334ba738bef2 100644 --- a/drivers/spi/spi-qpic-snand.c +++ b/drivers/spi/spi-qpic-snand.c @@ -850,8 +850,6 @@ static int qcom_spi_read_page_ecc(struct qcom_nand_controller *snandc, snandc->regs->ecc_bch_cfg = cpu_to_le32(ecc_bch_cfg); snandc->regs->exec = cpu_to_le32(1); - qcom_spi_set_read_loc(snandc, 0, 0, 0, ecc_cfg->cw_data, 1); - qcom_clear_bam_transaction(snandc); qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0); @@ -941,8 +939,6 @@ static int qcom_spi_read_page_oob(struct qcom_nand_controller *snandc, snandc->regs->ecc_bch_cfg = cpu_to_le32(ecc_bch_cfg); snandc->regs->exec = cpu_to_le32(1); - qcom_spi_set_read_loc(snandc, 0, 0, 0, ecc_cfg->cw_data, 1); - qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0); qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0); qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_clr, -- 2.47.3