From d2bfa3f72d4762f5e531bfe29781d9a62fea5847 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Wed, 24 Dec 2025 06:52:05 +0200 Subject: [PATCH] ARM: dts: lpc32xx: Update spi clock properties PL022 binding require two clocks to be defined but NXP LPC32xx platform doesn't comply with the bindings and define only one clock i.e apb_pclk. Update SPI clocks and clocks-names property by adding appropriate clock reference to make it compliant with the bindings. Noteworthy, strictly speaking the change tackles DT ABI by changing the order in the list of clock-names property values, however this level of impact is considered as acceptable. Cc: Vladimir Zapolskiy Signed-off-by: Kuldeep Singh [vzapolskiy: rebased and minor update to the commit message] Reviewed-by: Frank Li Signed-off-by: Vladimir Zapolskiy --- arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi index e780451fd3352..206c66bdfe41e 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi @@ -172,8 +172,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x20084000 0x1000>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk LPC32XX_CLK_SSP0>; - clock-names = "apb_pclk"; + clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -196,8 +196,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x2008c000 0x1000>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk LPC32XX_CLK_SSP1>; - clock-names = "apb_pclk"; + clocks = <&clk LPC32XX_CLK_SSP1>, <&clk LPC32XX_CLK_SSP1>; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; -- 2.47.3