From d4407370d9f55cfe677a34668d97afa6f5d1cab1 Mon Sep 17 00:00:00 2001 From: Wilco Dijkstra Date: Wed, 29 Jun 2016 13:11:48 +0000 Subject: [PATCH] Increase loop alignment on Cortex cores to 8 and set function alignment to 16. This makes things consistent across big.LITTLE cores, improves performance of benchmarks with tight loops and reduces performance variations due to small changes in code layout. gcc/ * config/aarch64/aarch64.c (cortexa53_tunings): Increase loop alignment to 8. Set function alignment to 16. (cortexa35_tunings): Likewise. (cortexa57_tunings): Increase loop alignment to 8. (cortexa72_tunings): Likewise. (cortexa73_tunings): Likewise. From-SVN: r237851 --- gcc/ChangeLog | 9 +++++++++ gcc/config/aarch64/aarch64.c | 14 +++++++------- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cccf296932d1..dc5b6814e2fa 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-06-29 Wilco Dijkstra + + * config/aarch64/aarch64.c (cortexa53_tunings): + Increase loop alignment to 8. Set function alignment to 16. + (cortexa35_tunings): Likewise. + (cortexa57_tunings): Increase loop alignment to 8. + (cortexa72_tunings): Likewise. + (cortexa73_tunings): Likewise. + 2016-06-29 Matthew Wahab * doc/sourcebuild.texi (Effective-Target keywords): Add entries diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 7617f9fb273d..314deb5836d8 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -454,9 +454,9 @@ static const struct tune_params cortexa35_tunings = 1, /* issue_rate */ (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ - 8, /* function_align. */ + 16, /* function_align. */ 8, /* jump_align. */ - 4, /* loop_align. */ + 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ 1, /* vec_reassoc_width. */ @@ -480,9 +480,9 @@ static const struct tune_params cortexa53_tunings = 2, /* issue_rate */ (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ - 8, /* function_align. */ + 16, /* function_align. */ 8, /* jump_align. */ - 4, /* loop_align. */ + 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ 1, /* vec_reassoc_width. */ @@ -508,7 +508,7 @@ static const struct tune_params cortexa57_tunings = | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ 16, /* function_align. */ 8, /* jump_align. */ - 4, /* loop_align. */ + 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ 1, /* vec_reassoc_width. */ @@ -534,7 +534,7 @@ static const struct tune_params cortexa72_tunings = | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops */ 16, /* function_align. */ 8, /* jump_align. */ - 4, /* loop_align. */ + 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ 1, /* vec_reassoc_width. */ @@ -560,7 +560,7 @@ static const struct tune_params cortexa73_tunings = | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops */ 16, /* function_align. */ 8, /* jump_align. */ - 4, /* loop_align. */ + 8, /* loop_align. */ 2, /* int_reassoc_width. */ 4, /* fp_reassoc_width. */ 1, /* vec_reassoc_width. */ -- 2.47.2