From d8ce633518b4b92b9d48e0769d0faa1ff9b548d7 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 22 Oct 2025 12:50:26 -0400 Subject: [PATCH] arm64: dts: imx8-ss-conn: add fsl,tuning-step for usdhc1 and usdhc2 Add fsl,tuning-step for usdhc1 and usdhc2 to improve card compatibility. Signed-off-by: Frank Li Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi index 0b8b32f697681..f99b9ce5f6540 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi @@ -80,6 +80,8 @@ conn_subsys: bus@5b000000 { assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <400000000>; power-domains = <&pd IMX_SC_R_SDHC_0>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step = <2>; status = "disabled"; }; @@ -108,6 +110,8 @@ conn_subsys: bus@5b000000 { assigned-clocks = <&clk IMX_SC_R_SDHC_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <200000000>; power-domains = <&pd IMX_SC_R_SDHC_2>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step = <2>; status = "disabled"; }; -- 2.47.3