From d9d2f4419554b0ff1478d35c97740f00af0b05b0 Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Wed, 8 May 2024 18:47:49 +0300 Subject: [PATCH] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMIN Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_VMIN register macro. Reviewed-by: Rodrigo Vivi Link: https://patchwork.freedesktop.org/patch/msgid/ac1c6545a80e4cbdc98f54f8d67e69fd46cdcc91.1715183162.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index d9024ccf6098d..fd0f0794f6dc4 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -218,7 +218,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) return; } - intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); + intel_de_write(dev_priv, TRANS_VRR_VMIN(dev_priv, cpu_transcoder), + crtc_state->vrr.vmin - 1); intel_de_write(dev_priv, TRANS_VRR_VMAX(dev_priv, cpu_transcoder), crtc_state->vrr.vmax - 1); intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), @@ -312,7 +313,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1; crtc_state->vrr.vmax = intel_de_read(dev_priv, TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; - crtc_state->vrr.vmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(cpu_transcoder)) + 1; + crtc_state->vrr.vmin = intel_de_read(dev_priv, + TRANS_VRR_VMIN(dev_priv, cpu_transcoder)) + 1; } if (crtc_state->vrr.enable) { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e24a6998babd3..90f73b5ede3a8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1254,7 +1254,7 @@ #define _TRANS_VRR_VMIN_B 0x61434 #define _TRANS_VRR_VMIN_C 0x62434 #define _TRANS_VRR_VMIN_D 0x63434 -#define TRANS_VRR_VMIN(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMIN_A) +#define TRANS_VRR_VMIN(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMIN_A) #define VRR_VMIN_MASK REG_GENMASK(15, 0) #define _TRANS_VRR_VMAXSHIFT_A 0x60428 -- 2.47.2